PSMN3R3-40YS,115 NXP Semiconductors, PSMN3R3-40YS,115 Datasheet - Page 9

MOSFET N-CH 40V LFPAK

PSMN3R3-40YS,115

Manufacturer Part Number
PSMN3R3-40YS,115
Description
MOSFET N-CH 40V LFPAK
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PSMN3R3-40YS,115

Input Capacitance (ciss) @ Vds
2754pF @ 20V
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
3.3 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
40V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
4V @ 1mA
Gate Charge (qg) @ Vgs
49nC @ 10V
Power - Max
117W
Mounting Type
Surface Mount
Package / Case
SC-100, SOT-669
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
3.3 mOhms
Drain-source Breakdown Voltage
40 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
97 A, 100 A
Power Dissipation
117 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5590-2
NXP Semiconductors
PSMN3R3-40YS
Product data sheet
Fig 13. Drain-source on-state resistance as a function
Fig 15. Gate-source voltage as a function of gate
R
(mΩ)
V
DSon
(V)
GS
20
15
10
10
5
0
8
6
4
2
0
of drain current; typical values
charge; typical values
0
0
25
8V
20
V
GS
50
(V) = 5.5
40
V
DS
75
Q
= 20V
All information provided in this document is subject to legal disclaimers.
G
003aae216
003aae218
I
D
(nC)
(A)
10
20
8
Rev. 04 — 25 October 2010
6
100
60
N-channel LFPAK 40 V 3.3 mΩ standard level MOSFET
Fig 14. Gate charge waveform definitions
Fig 16. Input, output and reverse transfer capacitances
(pF)
C
10
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
V
-1
V
V
V
GS(pl)
DS
GS(th)
GS
Q
GS1
1
I
Q
PSMN3R3-40YS
D
GS
Q
GS2
Q
G(tot)
Q
GD
10
© NXP B.V. 2010. All rights reserved.
V
DS
003aaa508
003aae215
(V)
C
C
C
iss
oss
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10
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