FDMS7670AS Fairchild Semiconductor, FDMS7670AS Datasheet - Page 2
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FDMS7670AS
Manufacturer Part Number
FDMS7670AS
Description
MOSFET N-CH 30V SYNCFET POWER56
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®, SyncFET™r
Datasheet
1.FDMS7670AS.pdf
(8 pages)
Specifications of FDMS7670AS
Input Capacitance (ciss) @ Vds
4225pF @ 15V
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
3 mOhm @ 21A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
22A
Vgs(th) (max) @ Id
3V @ 1mA
Gate Charge (qg) @ Vgs
66nC @ 10V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
8-PQFN, Power56
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
3 m Ohms
Forward Transconductance Gfs (max / Min)
300 S
Drain-source Breakdown Voltage
30 V
Continuous Drain Current
42 A
Power Dissipation
65 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDMS7670AS
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
FDMS7670AS Rev.C1
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Notes:
1. R
2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%.
3. E
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
DSS
GSS
d(on)
r
d(off)
f
rr
DS(on)
FS
BV
GS(th)
SD
the user's board design.
iss
oss
rss
g
g
g
gs
gd
rr
V
Symbol
AS
DSS
T
T
JA
GS(th)
DSS
J
J
of 98 mJ is based on starting T
is determined with the device mounted on a 1in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current, Forward
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
(Note 2)
J
= 25
Parameter
°
C, L = 1 mH, I
2
T
a. 50 °C/W when mounted on a
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
A
1 in
= 25 °C unless otherwise noted
AS
2
= 14 A, V
pad of 2 oz copper.
DD
= 27 V, V
V
V
V
V
V
f = 1 MHz
V
I
V
V
V
V
V
V
V
I
I
I
V
V
D
F
D
D
DD
GS
GS
GS
GS
GS
GS
GS
GS
DS
DS
GS
GS
DS
GS
= 21 A, di/dt = 300 A/ s
= 10 mA, referenced to 25 °C
= 1 mA, V
= 10 mA, referenced to 25 °C
GS
= 15 V, V
= 15 V, I
= 10 V, R
= 0 V to 10 V
= 0 V to 4.5 V
= 5 V, I
= 0 V, I
= 0 V, I
= 24 V, V
= V
= 10 V, I
= 7 V, I
= 4.5 V, I
= 10 V, I
= 20 V, V
= 10 V. 100% test at L = 0.3 mH, I
2
DS
Test Conditions
, I
D
D
S
S
D
GS
D
D
D
= 2 A
= 21 A
D
= 21 A
= 19 A
GS
GEN
GS
DS
= 1 mA
= 21 A,
= 21 A
= 21 A, T
= 17 A
= 0 V
= 0 V,
= 0 V
= 0 V
= 6
V
I
D
DD
= 21 A
J
= 15 V,
= 125 °C
(Note 2)
(Note 2)
JC
AS
is guaranteed by design while R
= 21 A.
b. 125 °C/W when mounted on a
Min
1.2
minimum pad of 2 oz copper.
30
3175
1175
0.43
0.75
110
300
1.3
Typ
1.6
2.4
2.5
3.0
3.0
8.5
4.9
35
41
14
35
47
22
-5
14
6
5
4225
1565
Max
165
2.6
0.7
1.2
500
100
3.0
3.0
3.2
3.5
3.8
56
67
25
12
56
10
66
31
www.fairchildsemi.com
CA
is determined by
mV/°C
mV/°C
Units
m
nC
pF
pF
pF
nA
nC
nC
nC
nC
ns
ns
ns
ns
ns
V
V
S
V
A