XC3S50AN-5FTG256C Xilinx Inc, XC3S50AN-5FTG256C Datasheet - Page 67

• Manufacturer Part Number: XC3S50AN-5FTG256C
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S50AN-5FTG256C

• Number Of Logic Elements/cells: 1584
• Number Of Labs/clbs: 176
• Total Ram Bits: 55296
• Number Of I /o: 195
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Information Read
Table 6-8:
Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
Notes:
1. The information read command is supported in simulation.
MOSI
MISO
Pin
R
Information Read Command
Command
Byte 1
0x9F
High
See also
The ISF memory supports JEDEC standards to enable systems and software to
electronically query and identify the device while it is in system. The ISF Information Read
command complies with the JEDEC method, “Manufacturer and Device ID Read Methodology
for SPI Compatible Serial Interface Memory Devices.” This method identifies various attributes
about the Flash memory, including the following information.
•
•
•
•
•
•
To read the ISF Information, the FPGA application must perform the following operations
using the SPI_ACCESS design primitive.
•
•
•
•
Memory manufacturer
Vendor-specific device family identifier
The vendor-specific device identifier for the specified family
The number of bits stored per memory cell
The product version
The number of additional Extended Device Information bytes.
Drive CSB Low while CLK is High or on the rising edge of CLK.
On the falling edge of CLK, serially clock in the Information Read command code,
0x9F, most-significant bit first.
On the clock cycle following the last bit of the command code, the ISF memory
presents the first byte of the ISF Information value on the SPI_ACCESS MISO output
pin.
♦
♦
♦
♦
To end the data transfer, drive CSB High on the falling edge of CLK. The CSB control
can be deasserted at any time and does not require the FPGA application to read the
entire ISF Information value.
Clock out each information byte, most-significant bit first.
The first byte contains the Manufacturer ID, as shown in
The next two bytes contain the Device ID, as shown in
The next bytes specify the Extended Device Information String Length, which is
0x00 indicating that no additional information follows. As indicated in the
JEDEC standard, reading the Extended Device Information String Length and any
subsequent data is optional.
Figure 1-3, page 12
Manufacturer ID
Byte 2
0x1F
XX
www.xilinx.com
for an example waveform for this command.
JEDEC Manufacturer and Device Identifier
Code/Memory
Density Code
Family
Byte 3
XX
Device ID
Byte 4
0x00
XX
Table 6-11
Table
6-10.
Information Read
Extended Info
and
Byte 5
0x00
XX
Table
6-12.
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