EM773FHN33,551 NXP Semiconductors, EM773FHN33,551 Datasheet - Page 13

• Manufacturer Part Number: EM773FHN33,551
• Description: IC ENERGY METER ARM 32VQFN
• Manufacturer: NXP Semiconductors

Specifications of EM773FHN33,551

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Output Voltage: 3.6 V
• Output Current: 20 mA
• Output Power: 1.5 W
• Input Voltage: 1.8 V to 3.6 V
• Switching Frequency: 48 MHz
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 50 %
• Number Of Outputs: 10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-5213

NXP Semiconductors
EM773
Objective data sheet
7.14.1 Features
7.15.1 Crystal oscillators
7.13 System tick timer
7.14 Watchdog timer
7.15 Clocking and power control
The ARM Cortex-M0 includes a system tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a fixed time interval (typically 10 ms).
The purpose of the watchdog is to reset the microcontroller within a selectable time
period.
The EM773 includes three independent oscillators. These are the system oscillator, the
Internal RC oscillator (IRC), and the Watchdog oscillator. Each oscillator can be used for
more than one purpose as required in a particular application.
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Four match registers per timer that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator
(IRC), the Watchdog oscillator, or the main clock. This gives a wide range of potential
timing choices of Watchdog operation under different power reduction conditions. It
also provides the ability to run the WDT from an entirely internal source that is not
dependent on an external crystal and its associated components and wiring for
increased reliability.
All information provided in this document is subject to legal disclaimers.
cy(WDCLK)
Rev. 1 — 1 September 2010
× 4.
cy(WDCLK)
× 256 × 4) to (T
cy(WDCLK)
Energy metering IC
× 2
© NXP B.V. 2010. All rights reserved.
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× 4) in
EM773
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