PIC16LF1526-I/MR Microchip Technology, PIC16LF1526-I/MR Datasheet - Page 143

• Manufacturer Part Number: PIC16LF1526-I/MR
• Description: MCU PIC 14KB FLASH 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1526-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C
• Maximum Clock Frequency: 20 MHz
• Number Of Timers: ÿ6 x 8-bit, 3 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 13-2:
REGISTER 13-3:
TABLE 13-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
ANSELB
INTCON
IOCBP
IOCBN
IOCBF
TRISB
Legend: — = unimplemented location, read as ‘ 0 ’. Shaded cells are not used by Interrupt-on-Change.
R/W/HS-0/0
IOCBN7
R/W-0/0
IOCBF7
Name
IOCBN<7:0>: Interrupt-on-Change PORTB Negative Edge Enable bits
1 = Interrupt-on-Change enabled on the pin for a negative going edge. Associated Status bit and interrupt
0 = Interrupt-on-Change disabled for the associated pin
IOCBF<7:0>: Interrupt-on-Change PORTB Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
IOCBP7
IOCBN7
IOCBF7
TRISB7
R/W/HS-0/0
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPT-ON-CHANGE
Bit 7
R/W-0/0
IOCBN6
GIE
IOCBF6
—
Set when IOCBPx = 1 and a rising edge was detected on RBx, or when IOCBNx = 1 and a falling edge
was detected on RBx.
flag will be set upon detecting an edge.
IOCBN: INTERRUPT-ON-CHANGE PORTB NEGATIVE EDGE REGISTER
IOCBF: INTERRUPT-ON-CHANGE PORTB FLAG REGISTER
IOCBN6
IOCBP6
IOCBF6
TRISB6
PEIE
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
R/W/HS-0/0
IOCBN5
R/W-0/0
IOCBF5
IOCBN5
TMR0IE
IOCBP5
IOCBF5
TRISB5
ANSB5
Bit 5
R/W/HS-0/0
R/W-0/0
IOCBN4
IOCBF4
Preliminary
IOCBP4
IOCBN4
IOCBF4
TRISB4
ANSB4
INTE
Bit 4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
R/W/HS-0/0
IOCBN3
R/W-0/0
IOCBF3
IOCBN3
IOCBP3
IOCBF3
TRISB3
ANSB3
IOCIE
Bit 3
PIC16(L)F1526/27
IOCBN2
TMR0IF
IOCBP2
IOCBF2
TRISB2
ANSB2
R/W/HS-0/0
Bit 2
R/W-0/0
IOCBN2
IOCBF2
IOCBP1
IOCBN1
IOCBF1
TRISB1
ANSB1
Bit 1
INTF
R/W/HS-0/0
IOCBN1
R/W-0/0
IOCBF1
IOCBN0
IOCBP0
IOCBF0
TRISB0
ANSB0
IOCIF
Bit 0
DS41458A-page 143
R/W/HS-0/0
R/W-0/0
IOCBN0
IOCBF0
Register
on Page
124
142
142
142
123
80
bit 0
bit 0