PIC16LF1526-I/MR Microchip Technology, PIC16LF1526-I/MR Datasheet - Page 170

• Manufacturer Part Number: PIC16LF1526-I/MR
• Description: MCU PIC 14KB FLASH 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1526-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C
• Maximum Clock Frequency: 20 MHz
• Number Of Timers: ÿ6 x 8-bit, 3 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16(L)F1526/27
18.3
Timer1/3/5 has four prescaler options allowing 1, 2, 4 or
8 divisions of the clock input. The TxCKPS bits of the
TxCON register control the prescale counter. The
prescale counter is not directly readable or writable;
however, the prescaler counter is cleared upon a write to
TMRxH or TMRxL.
18.4
A dedicated low-power 32.768 kHz oscillator circuit is
built-in between pins SOSCI (input) and SOSCO
(amplifier output). This internal circuit is to be used in
conjunction with an external 32.768 kHz crystal.
The oscillator circuit is enabled by setting the SOSCEN
bit of the TxCON register. The oscillator will continue to
run during Sleep.
18.5
If control bit TxSYNC of the TxCON register is set, the
external clock input is not synchronized. The timer
increments asynchronously to the internal phase
clocks. If the external clock source is selected then the
timer will continue to run during Sleep and can
generate an interrupt on overflow, which will wake-up
the processor. However, special precautions in
software are needed to read/write the timer (see
Section 18.5.1 “Reading and Writing Timer1/3/5 in
Asynchronous Counter Mode”
DS41458A-page 170
Note:
Note:
Timer1/3/5 Prescaler
Timer1/3/5 Oscillator
Timer1/3/5 Operation in
Asynchronous Counter Mode
The oscillator requires a start-up and
stabilization time before use. Thus,
SOSCEN should be set and a suitable
delay
Timer1/3/5.
When switching from synchronous to
asynchronous operation, it is possible to
skip an increment. When switching from
asynchronous to synchronous operation,
it is possible to produce an additional
increment.
observed
prior
).
to
enabling
Preliminary
18.5.1
Reading TMRxH or TMRxL while the timer is running
from an external asynchronous clock will ensure a valid
read (taken care of in hardware). However, the user
should keep in mind that reading the 16-bit timer in two
8-bit values itself, poses certain problems, since the
timer may overflow between the reads.
For writes, it is recommended that the user simply stop
the timer and write the desired values. A write
contention may occur by writing to the timer registers,
while the register is incrementing. This may produce an
unpredictable value in the TMRxH:TMRxL register pair.
18.6
Timer1/3/5 can be configured to count freely or the
count can be enabled and disabled using Timer1/3/5
gate circuitry. This is also referred to as Timer1/3/5
Gate Enable.
Timer1/3/5 gate can also be driven by multiple select-
able sources.
18.6.1
The Timer1/3/5 Gate Enable mode is enabled by set-
ting the TMRxGE bit of the TxGCON register. The
polarity of the Timer1/3/5 Gate Enable mode is config-
ured using the TxGPOL bit of the TxGCON register.
When Timer1/3/5 Gate Enable mode is enabled,
Timer1/3/5 will increment on the rising edge of the
Timer1/3/5 clock source. When Timer1/3/5 Gate
Enable mode is disabled, no incrementing will occur
and Timer1/3/5 will hold the current count. See
Figure 18-4
TABLE 18-3:
TxCLK




Timer1/3/5 Gate
READING AND WRITING
TIMER1/3/5 IN ASYNCHRONOUS
COUNTER MODE
TIMER1/3/5 GATE ENABLE
TxGPOL
for timing details.
0
0
1
1
TIMER1/3/5 GATE ENABLE
SELECTIONS
 2011 Microchip Technology Inc.
TxG
0
1
0
1
Counts
Holds Count
Holds Count
Counts
Timer1/3/5
Operation