MPC8313E-RDBC Freescale Semiconductor, MPC8313E-RDBC Datasheet - Page 26

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MPC8313E-RDBC

Manufacturer Part Number
MPC8313E-RDBC
Description
BOARD CPU 8313E VER 2.2
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr

Specifications of MPC8313E-RDBC

Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPC8313E
Connectors, Jumpers, Switches, and LEDs
3.10
DIP switch S3 selects the reset configuration source (RST_CFG_SRC) for the MPC8313E.
shows the factory default configuration of S3.
Check the MPC8313E reference manual for the meaning of the CFG_RST_SRC combination. By default,
the DIP switch is set to all ON, meaning CFG_RST_SRC[0..3] = 0000. In this case, the hardware reset
configuration is loaded from local bus NOR flash memory.
3.11
DIP switch S4 on the RDB is shown in
RSVD is reserved. When software options are implemented, their values can be read from a buffer on the
board. CFG_BOOT_ECC_DIS switch is OFF by default to disable booting with ECC by driving HIGH to
26
DIP Switch S3
DIP Switch S4
PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
0
1
0
1
Figure
Figure 27. DIP Switch S3
Figure 28. DIP Switch S4
ON
ON
1
1
28, with the factory default configuration.
2
2
3
3
4
4
Freescale Semiconductor
Figure 27

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