MPC8313E-RDBC Freescale Semiconductor, MPC8313E-RDBC Datasheet - Page 39

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MPC8313E-RDBC

Manufacturer Part Number
MPC8313E-RDBC
Description
BOARD CPU 8313E VER 2.2
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr

Specifications of MPC8313E-RDBC

Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPC8313E
configuration word lower (RCWL) and reset configuration word higher (RCWH) and is loaded from the
local bus during the power-on or hard reset flow. The default RCW low bit setting is 0x6204_0000. The
default RCW high bit setting is 0xA060_7800. The RCW is located at the lowest 64 bytes of the boot flash
memory, which is 0xFE00_0000 if the default memory map is used.
Table 18
The RCW definitions are shown in
Freescale Semiconductor
Field PCIHOST
Field
Field
Field
Bits
2–3
0
1
LBCM
shows the default RCW in the flash memory.
16
16
0
0
DDRCM
TSEC1M
17
1
17
1
Figure 40. Reset Configuration Word High (RCWH) Bit Settings
Figure 39. Reset Configuration Word Low (RCWL) Bit Settings
DDRCM
LBCM
Name
FE000000:
FE000010:
FE000020:
FE000030:
PowerQUICC™ MPC8313E Reference Design Board (RDB), Rev. 4
PCIABR
18
2
18
2
19
3
Table 18. Default RCW in Flash Memory
A0A0A0A0
Figure 39
62626262
00000000
78787878
Local bus clock mode Local Bus Controller Clock: CSB_CLK
DDR SDRAM clock
mode
Reserved
19
Table 19. RCWL Bit Descriptions
3
20
4
TSEC2M
Meaning
COREDIS BMS BOOTSEQ SWEN ROMLOC
21
5
SPMF
20
and
4
A0A0A0A0
Address
22
62626262
00000000
78787878
6
Figure
21
5
23
0: Default
1
DDR Controller Clock: CSB_CLK
0
1: Default
Must be set to 10
7
40.
22
6
24
04040404
00000000
60606060
00000000
8
23
7
25
9
24
8
10
26
04040404
00000000
60606060
00000000
25 26 27
Description
9
MPC8313E RDB Board Configuration
Ratio 1:1
Ratio 2:1
Ratio 1:1
Ratio 2:1
11
27
10 11
COREPLL
12
28
TLE LALE
12
28
RLEXT
13
29
13
29
14
30
14
30
15
31
15
31
39

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