MPC8313E-RDBC Freescale Semiconductor, MPC8313E-RDBC Datasheet - Page 17
MPC8313E-RDBC
Manufacturer Part Number
MPC8313E-RDBC
Description
BOARD CPU 8313E VER 2.2
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDBC
Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPC8313E
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- Download datasheet (2Mb)
Figure 4
6.2.2
Freescale Semiconductor
MCK[ n ] cycle time, MCK[ n ]/MCK[ n ] crossing
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCS[ n ] output setup with respect to MCK
MCS[ n ] output hold with respect to MCK
MCK to MDQS Skew
MDQ//MDM output setup with respect to
MDQS
MDQ//MDM output hold with respect to MDQS
MDQS preamble start
illustrates the DDR input timing diagram showing the t
Table 20. DDR and DDR2 SDRAM Output AC Timing Specifications for Rev. 1.0 Silicon
MDQS[ n ]
DDR and DDR2 SDRAM Output AC Timing Specifications
MDQ[ x ]
MCK[ n ]
MCK[ n ]
Parameter
MPC8313E PowerQUICC
333 MHz
266 MHz
333 MHz
266 MHz
333 MHz
266 MHz
333 MHz
266 MHz
333 MHz
266 MHz
333 MHz
266 MHz
t
t
MCK
Figure 4. DDR Input Timing Diagram
DISKEW
™
Symbol
t
t
t
t
t
t
t
t
t
t
DDKHMH
DDKHDS,
DDKHDX,
DDKHMP
DDKHAS
DDKHAX
DDKHCS
DDKHCX
DDKLDS
DDKLDX
II Pro Processor Hardware Specifications, Rev. 3
t
MCK
D0
1
–0.5 × t
D1
t
DISKEW
3.15
–0.6
1100
Min
3.15
3.15
800
900
900
2.1
2.5
2.4
2.4
2.4
MCK
6
– 0.6
DISKEW
–0.5 × t
timing parameter.
Max
0.6
10
—
—
—
—
—
—
—
—
—
—
—
—
MCK
+ 0.6
DDR and DDR2 SDRAM
Unit
ns
ns
ns
ns
ns
ns
ps
ps
ns
Notes
2
4
6
3
3
3
3
5
5
17
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