DP83865DVH National Semiconductor, DP83865DVH Datasheet - Page 38

• Manufacturer Part Number: DP83865DVH
• Description: 10/100/1000BASE-T TRANSCEIVER, SMD
• Manufacturer: National Semiconductor

Specifications of DP83865DVH

• Data Rate: 1000Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u, IEEE 802.3z
• Supply Current: 430µA
• Supply Voltage Range: 2.375V To 2.625V, 3.135V To 3.465V
• Operating Temperature Range: 0°C To +70°C
• Interface Type: GMII, MII, RGMII
• Rohs Compliant: Yes
• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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2.0 Register Block
Note:
13:11
10:1
15:0
15:0
9:8
7:0
Bit
Bit
Bit
Bit
10
15
14
0
Registers 0x1B and 0x1C are reserved.
Table 27. Expanded Memory Address Register (Exp_mem_addr) address 0x1E (30’d)
Expanded Memory
Expanded Memory
Link/Link-ACT sel
tx_bist_pak_type
tx_bist_pak_cnt
Table 26. Expanded Memory Data Register (Exp_mem_data) address 0x1D (29’d)
bist_cnt_sel
tx_bist_pak
rx_bist_en
Bit Name
Reserved
Table 25. BIST Configuration Register 2 (BIST_CFG2) address 0x1A (26’d)
Bit Name
Reserved
Bit Name
Bit Name
Table 24. BIST Configuration Register 1 (BIST_CFG1) address 0x19 (25’d)
Address
Data
(Continued)
Default
Default
Default
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RO
0, RO
Transmit BIST Packet Type:
1 = PSR9
0 = User defined packet
Write as 0, ignore on read.
User Defined Packet Content: This field sets the packet content
for the transmit BIST packets if the user defined packet type in bit
10 is selected.
Receive BIST Enable: This bit enables the receive BIST
counter. The BIST counter operation does not interfere with nor-
mal PHY operation.
0 = BIST counter disabled
1 = BIST counter enabled
BIST Counter Select: This bit selects whether the upper or lower
16 bit of the 32 bit counter value are shown in the BIST_CNT reg-
ister.
0 = displays lower 16 bit
1 = displays upper 16 bit
Transmit BIST Packet Count: Sets the number of transmit pack-
ets
000 = continuous transmit
001 = 1 packet
010 = 10 packets
011 = 100 packets
100 = 1,000 packets
101 = 10,000 packets
110 = 100,000 packets
111 = 10,000,000 packets
Write as 0, ignore on read.
Link/Link-ACT Select: This bit has no impact when Reg 0x13.5
= 0.
1 = LINK only
0 = Combined Link/ACT
Expanded Memory Data: Data to be written to or read from ex-
panded memory. Note that in 8-bit mode, the data resides at the
LSB octet of this register.
Expanded Memory Address: Pointer to the address in expand-
ed memory. The pointer is 16-bit wide.
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Description
Description
Description
Description