ADN2531ACPZ-R2 Analog Devices Inc, ADN2531ACPZ-R2 Datasheet - Page 12
![IC, LASER DIODE DRIVER, 11.3GBPS LFCSP16](/photos/39/61/396134/4243133_sml.jpg)
ADN2531ACPZ-R2
Manufacturer Part Number
ADN2531ACPZ-R2
Description
IC, LASER DIODE DRIVER, 11.3GBPS LFCSP16
Manufacturer
Analog Devices Inc
Datasheet
1.ADN2531ACPZ-R7.pdf
(20 pages)
Specifications of ADN2531ACPZ-R2
Laser Driver Type
Laser Diode
Supply Current
36mA
Bias Current
100mA
Modulation Current
70mA
Data Rate
11.3Gbps
Supply Voltage Range
3V To 3.6V
Driver Case Style
LFCSP
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADN2531
The equivalent circuits of the BSET, IBIAS, and IBMON pins
are shown in Figure 26 to Figure 28.
The recommended configuration for the BSET, IBIAS, and
IBMON pins is shown in Figure 29.
The circuit used to drive the BSET voltage must be able to drive
the 1 kΩ input resistance of the BSET pin. For proper operation
of the bias current source, the voltage at the IBIAS pin must be
between the compliance voltage specifications for this pin over
supply, temperature, and bias current range (see Table 1). The
maximum compliance voltage is specified for only two bias
current levels (10 mA and 100 mA), but it can be calculated for
any bias current by
See the Headroom Calculations section for examples.
The function of Inductor L is to isolate the capacitance of the
IBIAS output from the high frequency signal path. For
recommended components, see Table 6.
Figure 29. Recommended Configuration for BSET, IBIAS, and IBMON Pins
V
COMPLIANCE
V
BSET
BSET
Figure 28. Equivalent Circuit of the IBMON Pin
Figure 27. Equivalent Circuit of the IBIAS Pin
Figure 26. Equivalent Circuit of the BSET Pin
(V) = V
V
CC
V
CC
BSET
V
CC
ADN2531
CC
IBIAS
(V) − 0.75 − 4.4 × I
GND
800Ω
200Ω
V
10Ω
CC
IBMON
100Ω
IBIAS
IBMON
TO LASER CATHODE
V
CC
V
500Ω
100Ω
CC
V
L
2kΩ
CC
R
750Ω
IBMON
I
BIAS
BIAS
(A)
Rev. 0 | Page 12 of 20
AUTOMATIC LASER SHUTDOWN (ALS)
The ALS pin is a digital input that enables/disables both the bias
and modulation currents, depending on the logic state applied,
as shown in Table 5.
Table 5. ALS Logic States
ALS Logic State
High
Low
Floating
The ALS pin is compatible with 3.3 V CMOS and LVTTL logic
levels. Its equivalent circuit is shown in Figure 30.
MODULATION CURRENT
The modulation current can be controlled by applying a dc
voltage to the MSET pin. This voltage is converted into a dc
current via a voltage-to-current converter that uses an
operational amplifier and a bipolar transistor, as shown in
Figure 31.
The dc current is switched by the data signal applied to the
input stage (DATAP and DATAN pins) and gained up by the
output stage to generate the differential modulation current at
the IMODP and IMODN pins. The output stage also generates
the active back-termination, which provides proper transmission
line termination. Active back-termination uses feedback around
an active circuit to synthesize a broadband termination resistance.
This provides excellent transmission line termination while
dissipating less power than a traditional resistor passive back-
termination. No portion of the modulation current flows in the
active back-termination resistance. All of the preset modulation
current (I
into the external load.
MSET
Figure 31. Generation of Modulation Current on the ADN2531
FROM CPA STAGE
400Ω
200Ω
MOD
), the range of which is specified in Table 1, flows
Figure 30. Equivalent Circuit of the ALS Pin
ALS
GND
V
CC
V
42kΩ
CC
100Ω
I
Disabled
Enabled
Enabled
BIAS
V
CC
and I
ADN2531
2kΩ
100Ω
MOD
I
MOD
IMODP
IMODN