TMC222-SI TRINAMIC, TMC222-SI Datasheet - Page 47

IC, MOTOR CTRL/DRVR, STEPPER, SOIC-20

TMC222-SI

Manufacturer Part Number
TMC222-SI
Description
IC, MOTOR CTRL/DRVR, STEPPER, SOIC-20
Manufacturer
TRINAMIC
Datasheet

Specifications of TMC222-SI

Motor Type
Stepper
No. Of Outputs
4
Output Current
800mA
Supply Voltage Range
8V To 29V
Driver Case Style
SOIC
No. Of Pins
20
Operating Temperature Range
-40°C To +125°C
Device Type
Motor
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMC222-SI
Manufacturer:
TRINAMI
Quantity:
20 000
TMC222 DATASHEET (V. 1.06 / March 15, 2007)
Revision History
Please refer to
product and on other products.
The TMCtechLIB CD-ROM including data sheets, application notes, schematics of evaluation
boards, software of evaluation boards, source code examples, parameter calculation
spreadsheets, tools, and more is available from TRINAMIC Motion Control GmbH & Co. KG by
request to
Copyright © 2004-2007 TRINAMIC Motion Control GmbH & Co. KG
up to 0.90p
Version
0.91p
0.92p
0.93p
1.01
1.02
1.03
1.04
1.05
1.06
info@trinamic.com
September 18, 2003 pins renamed according to TRINAMIC conventions; corrections
September 15, 2004 Updated Ordering Information; improved description of 2
www.trinamic.com
January 28, 2004 Order Code Update (Table 2: Ordering Information, page 7)
October 21, 2005 Unit [FS/s] for Vmin added for Table 4 page 11, hint concerning
August 24, 2004 velocity groups integrated into Vmax table; corrected and
October 1, 2004 New company address
January 7, 2005 Order code updated (Table 2: Ordering Information, page 7);
Mach 15, 2007 QFN32 package information added: Pin and Signal description to
April 23, 2004 New TRINAMIC logo; Table 5: Acc Parameter, page 11:
Date
July 9, 2003 before v. 0.90 changes on unpublished internal versions only
concerning cross references, drawings in PDF
combined cells with same value; ESW is zero when switch is
open (section 5.1.9, page 12); Table 9: OTP Memory Structure on
page 21: corrections concerning bit mappings (exchanged
locations of SecPos10… SecPos8 and StepMode1… StepMode
0); corrected command descriptions
enhanced Vmin table; corrected meaning of Shaft bit; FAQ
included
of RunInit in Reference Search / Position initialization; combined
tables for Irun and Ihold; some corrections to DC Parameters;
added final travel to secure position during RunInit; reworked
Internal handling of commands and flags
GetFullStatus1 (section 6.8.1, page 30) byte 1 (address)
corrected; hint concerning ResetPosition added (section 6.8.6,
page 32)
OTP memory (section 5.2, page 19); notes concerning "N/A = not
applicable" added due to customer requests, general hint
concerning N/A added and hint concerning slave address (byte 0)
vs. slave address (byte) of response datagrams added (section
6.8, page 30); hints added concerning the SWI switch input and
its ESW flag (section 5.1.9, page 12); hints concerning physical
address (section 6.3, page 26); GetFullStatus1 command
(Response) Byte 1 Structure corrected (section 6.8.1, page 30);
GetFullStatus2 command (Response) Byte 1 Structure corrected
(section 6.8.2, page 31); explanations and cross reference for
OTP from section 6.8.10, page 34 to section 5.2.3 page 21;
labeling indices of contend for TagPos 1 & 2 corrected for the
RunInit Command (section 6.8.8, page 33)
section 2.6 page 6, Ordering information to 4 page 7, Package
Outline information to 8 page 41;
Comment to 5.1.11, page 14: positions of Pos1 and Pos2;
orientation of marking outline for TMC222 symbols referring to the
SOIC package adapted to real marking (p. 1, p. 6)
for updated data sheets and application notes on this
Comments
nd
motion
47

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