ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 29

• Manufacturer Part Number: ADSP-BF538BBCZ-5F4
• Description: IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

• No. Of Bits: 16 Bit
• Frequency: 533MHz
• Supply Voltage: 1.25V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 533MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 19. Asynchronous Memory Read Cycle Timing with Asynchronous ARDY
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
S = number of programmed setup cycles, RA = number of programmed read access cycles.
Output pins include AMS3–0, ABE1–0, ADDR19–1, AOE, ARE.
SDAT
HDAT
DANR
HAA
DO
HO
CLKOUT
AMSx
ABE1–0
ADDR19–1
ARE
ARDY
AOE
DATA15–0
DATA15–0 Setup Before CLKOUT
DATA15–0 Hold After CLKOUT
ARDY Negated Delay from AMSx Asserted
ARDY Asserted Hold After ARE Negated
Output Delay After CLKOUT
Output Hold After CLKOUT
2 CYCLES
SETUP
t
DO
Figure 12. Asynchronous Memory Read Cycle Timing with Asynchronous ARDY
t
DANR
PROGRAMMED READ ACCESS
t
2
DO
2
Rev. A | Page 29 of 56 | January 2008
4 CYCLES
1
BE, ADDRESS
ACCESS EXTENDED
ADSP-BF538/ADSP-BF538F
Min
2.1
0.8
0.0
0.8
t
t
HO
SDAT
READ
1 CYCLE
Max
(S + RA – 2) × t
6.0
HOLD
t
HDAT
t
HAA
SCLK
t
HO
Unit
ns
ns
ns
ns
ns
ns