ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 44

• Manufacturer Part Number: ADSP-BF538BBCZ-5F4
• Description: IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

• No. Of Bits: 16 Bit
• Frequency: 533MHz
• Supply Voltage: 1.25V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 533MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-BF538/ADSP-BF538F
Timer Cycle Timing
Table 33
input signal is asynchronous in “width capture mode” and
“external clock mode” and has an absolute maximum input fre-
quency of f
Table 33. Timer Cycle Timing
1
Parameter
Timing Characteristics
t
t
Switching Characteristic
t
The minimum pulse widths apply for TMRx input pins in width capture and external clock modes. They also apply to the PF1 (TACLK) or PPI_CLK (TMRCLK) input pins
WL
WH
HTO
in PWM output mode.
CLKOUT
(PWM OUTPUT MODE)
EXTERNAL CLOCK MODES)
and
(WIDTH CAPTURE AND
SCLK
Figure 27
/2 MHz.
TMRx
TMRx
Timer Pulse Width Input Low
Timer Pulse Width Input High
Timer Pulse Width Output (measured in SCLK Cycles)
describe timer expired operations. The
1
1
(Measured in SCLK Cycles)
(Measured in SCLK Cycles)
Rev. A | Page 44 of 56 | January 2008
Figure 27. Timer PWM_OUT Cycle Timing
t
WL
t
WH
t
HTO
Min
1
1
1
Max
(2
32
– 1)
Unit
SCLK
SCLK
SCLK