ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 30

• Manufacturer Part Number: ADSP-BF538BBCZ-5F4
• Description: IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

• No. Of Bits: 16 Bit
• Frequency: 533MHz
• Supply Voltage: 1.25V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 533MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-BF538/ADSP-BF538F
Asynchronous Memory Write Cycle Timing
Table 20
on Page 31
tions for synchronous and for asynchronous ARDY.
Table 20. Asynchronous Memory Write Cycle Timing with Synchronous ARDY
1
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
Output pins include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, AWE.
SARDY
HARDY
DDAT
ENDAT
DO
HO
ADDR19–1
DATA15–0
and
CLKOUT
ABE1–0
AMSx
ARDY
describe asynchronous memory write cycle opera-
AWE
Table 21 on Page 31
ARDY Setup Before the Falling Edge of CLKOUT
ARDY Hold After the Falling Edge of CLKOUT
DATA15–0 Disable After CLKOUT
DATA15–0 Enable After CLKOUT
Output Delay After CLKOUT
Output Hold After CLKOUT
2 CYCLES
t
ENDAT
SETUP
t
DO
and
t
t
DO
SARDY
Figure 13. Asynchronous Memory Write Cycle Timing with Synchronous ARDY
WRITE DATA
Figure 13
PROGRAMMED WRITE
ACCESS 2 CYCLES
1
1
and
BE, ADDRESS
Rev. A | Page 30 of 56 | January 2008
Figure 14
t
HARD Y
t
SARDY
EXTENDED
ACCESS
1 CYCLE
t
HARDY
t
HO
1 CYCLE
HOLD
t
DDAT
t
HO
Min
4.0
0.0
1.0
0.8
Max
6.0
6.0
Unit
ns
ns
ns
ns
ns
ns