5M240ZT100C5N Altera, 5M240ZT100C5N Datasheet - Page 17

• Manufacturer Part Number: 5M240ZT100C5N
• Description: IC CPLD FLASH, 192, 7.5NS, 118.3MHZ, TQFP-100
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M240ZT100C5N

• Cpld Type: FLASH
• No. Of Macrocells: 192
• No. Of I/o's: 79
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 118.3MHz
• Supply Voltage Range: 1.71V To 1.89V
• Rohs Compliant: Yes
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 240
• Number Of Macrocells: 192
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 3: DC and Switching Characteristics for MAX V Devices
Timing Model and Specifications
Table 3–24. UFM Block Internal Timing Microparameters for MAX V Devices (Part 3 of 3)
Figure 3–3. UFM Read Waveform
January 2011 Altera Corporation
t
t
t
RA
OSCS
OSCH
Symbol
Maximum read access
time
Maximum delay between
the OSC_ENA rising edge
to the erase/program
signal rising edge
Minimum delay allowed
from the
erase/program signal
going low to OSC_ENA
signal going low
OSC_ENA
Parameter
Program
DRDout
DRShft
ARShft
DRDin
ARClk
ARDin
DRClk
Erase
Figure 3–3
UFM block timing parameters listed in
Busy
t
t
ASU
ADS
through
t
ACLK
Min
250
250
—
9 Address Bits
5M40Z/ 5M80Z/ 5M160Z/
Figure 3–5
C4
5M240Z/ 5M570Z
Max
65
—
—
t
t
ADH
show the read, program, and erase waveforms for
AH
t
DCO
Min
250
250
t
—
DSS
C5, I5
Table
t
DCLK
Max
65
—
—
16 Data Bits
3–24.
Min
250
250
—
t
C4
DSH
5M1270Z/ 5M2210Z
Max
65
—
—
MAX V Device Handbook
Min
250
250
—
C5, I5
Max
65
—
—
3–17
Unit
ns
ns
ns