5M240ZT100C5N Altera, 5M240ZT100C5N Datasheet - Page 6

no-image

5M240ZT100C5N

Manufacturer Part Number
5M240ZT100C5N
Description
IC CPLD FLASH, 192, 7.5NS, 118.3MHZ, TQFP-100
Manufacturer
Altera
Series
MAX Vr

Specifications of 5M240ZT100C5N

Cpld Type
FLASH
No. Of Macrocells
192
No. Of I/o's
79
Propagation Delay
7.5ns
Global Clock Setup Time
4.6ns
Frequency
118.3MHz
Supply Voltage Range
1.71V To 1.89V
Rohs Compliant
Yes
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
240
Number Of Macrocells
192
Number Of Gates
-
Number Of I /o
79
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA45
Quantity:
895
Part Number:
5M240ZT100C5N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA
0
Part Number:
5M240ZT100C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
5M240ZT100C5N
0
Part Number:
5M240ZT100C5N+CODE
Manufacturer:
ALTERA
0
3–6
Table 3–6. 3.3-V LVCMOS Specifications for MAX V Devices
Table 3–7. 2.5-V I/O Specifications for MAX V Devices
Table 3–8. 1.8-V I/O Specifications for MAX V Devices
MAX V Device Handbook
V
V
V
V
V
Note to
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the
V
V
V
V
V
Note to
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the
V
V
V
V
V
Notes to
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the
(2) This maximum V
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
CCIO
IH
IL
OH
OL
Symbol
Symbol
Symbol
MAX V Device Architecture
MAX V Device Architecture
MAX V Device Architecture
in
Table 3–2 on page
Table
Table
Table
3–6:
3–7:
3–8:
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
IH
reflects the JEDEC specification. The MAX V input buffer can tolerate a V
3–2.
Parameter
Parameter
chapter.
chapter.
chapter.
Parameter
IOH = –0.1 mA
IOH = –0.1 mA
IOL = 0.1 mA
IOL = 0.1 mA
IOH = –1 mA
IOH = –2 mA
IOL = 1 mA
IOL = 2 mA
IOH = –2 mA
IOL = 2 mA
Conditions
V
V
Conditions
CCIO
CCIO
Conditions
= 3.0,
= 3.0,
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Chapter 3: DC and Switching Characteristics for MAX V Devices
V
Minimum
0.65 × V
V
CCIO
Minimum
Minimum
CCIO
–0.5
2.375
IH
3.0
1.7
–0.5
1.7
1.71
–0.3
2.1
2.0
1.7
maximum of 4.0, as specified by the V
– 0.2
– 0.45
CCIO
January 2011 Altera Corporation
Maximum
Maximum
0.35 × V
Maximum
2.25
2.625
3.6
4.0
0.8
0.2
4.0
0.7
0.2
0.4
0.7
1.89
0.45
(2)
Operating Conditions
CCIO
I
parameter
Unit
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

Related parts for 5M240ZT100C5N