EPM7160SQC160-10N Altera, EPM7160SQC160-10N Datasheet - Page 8

IC PLD EEPROM 160 MACROCELL 10NS QFP-160

EPM7160SQC160-10N

Manufacturer Part Number
EPM7160SQC160-10N
Description
IC PLD EEPROM 160 MACROCELL 10NS QFP-160
Manufacturer
Altera
Series
MAX 7000Sr
Datasheet

Specifications of EPM7160SQC160-10N

Cpld Type
EEPROM
No. Of Macrocells
160
No. Of I/o's
104
Propagation Delay
10ns
Global Clock Setup Time
3.4ns
Frequency
149.3MHz
Supply Voltage Range
4.75V To 5.25V
Family Name
MAX 7000S
Memory Type
EEPROM
# Macrocells
160
Number Of Usable Gates
3200
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
10
# I/os (max)
104
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7160SQC160-10N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPM7160SQC160-10N
Manufacturer:
ALTERA
0
MAX 7000 Programmable Logic Device Family Data Sheet
Figure 2. MAX 7000E & MAX 7000S Device Block Diagram
8
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/GCLK1
6 to 16 I/O Pins
6 to 16 I/O Pins
INPUT/OE1
Control
Control
Block
Block
I/O
I/O
6
6
6 Output Enables
6 to16
6 to16
6 to16
6 to16
Figure 2
Logic Array Blocks
The MAX 7000 device architecture is based on the linking of high-
performance, flexible, logic array modules called logic array blocks
(LABs). LABs consist of 16-macrocell arrays, as shown in
Multiple LABs are linked together via the programmable interconnect
array (PIA), a global bus that is fed by all dedicated inputs, I/O pins, and
macrocells.
LAB A
LAB C
Macrocells
Macrocells
shows the architecture of MAX 7000E and MAX 7000S devices.
33 to 48
1 to 16
6 to16
6 to16
16
16
36
36
PIA
36
36
6 to16
6 to16
16
16
Macrocells
Macrocells
17 to 32
49 to 64
LAB D
LAB B
6 Output Enables
6 to16
6 to16
6 to16
6 to16
Control
Control
Block
Block
I/O
I/O
Altera Corporation
6
6
Figures 1
6 to 16 I/O Pins
6 to 16 I/O Pins
and 2.

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