M4A5-192/96-10VNC LATTICE SEMICONDUCTOR, M4A5-192/96-10VNC Datasheet - Page 11
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M4A5-192/96-10VNC
Manufacturer Part Number
M4A5-192/96-10VNC
Description
MACH4 ISP EEPLD, SMD, TQFP144, 5V
Manufacturer
LATTICE SEMICONDUCTOR
Series
IspMACH 4Ar
Datasheet
1.M4A5-19296-10VNC.pdf
(62 pages)
Specifications of M4A5-192/96-10VNC
No. Of Macrocells
192
No. Of I/o's
96
Propagation Delay
10ns
Frequency
100MHz
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Logic Case
RoHS Compliant
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The flip-flop can be configured as a D-type or T-type latch. J-K or S-R registers can be
synthesized. The primary flip-flop configurations are shown in Figure 6, although others are
possible. Flip-flop functionality is defined in Table 8. Note that a J-K latch is inadvisable as it will
cause oscillation if both J and K inputs are HIGH.
e. T-type with programmable T polarity
c. Latch with XOR
a. D-type with XOR
L
T
G
D
Figure 6. Primary Macrocell Configurations
AP AR
AP AR
AP AR
g. Combinatorial with programmable polarity
Q
Q
Q
ispMACH 4A Family
b. D-type with programmable D polarity
d. Latch with programmable D polarity
f. Combinatorial with XOR
D
L
G
AP AR
AP AR
Q
Q
17466G-011
11