IS43R16160B-6TL INTEGRATED SILICON SOLUTION (ISSI), IS43R16160B-6TL Datasheet - Page 29

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IS43R16160B-6TL

Manufacturer Part Number
IS43R16160B-6TL
Description
SDRAM, DDR, 16M X 16, 2.5V, 66TSOP2
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS43R16160B-6TL

Access Time
0.7ns
Page Size
256Mbit
Memory Case Style
TSOP-2
No. Of Pins
66
Operating Temperature Range
0°C To +70°C
Memory Type
DRAM - Synchronous
Memory Configuration
4 BLK (4M X 16)
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS43R83200B
IS43R16160B, IC43R16160B
DDR SDRAM (Rev.1.1)
Integrated Silicon Solution, Inc.
Rev. B
10/31/08
BURST INTERRUPTION
[Read Interrupted by Read]
READ to READ interval is minimum 1CLK.
[Read Interrupted by precharge]
minimum 1 CLK. A PRE command to output disable latency is equivalent to the /CAS Latency.
As a result, READ to PRE interval determines valid data length to be output. The figure below
shows examples of BL=8.
Burst read operation can be interrupted by new read of any bank. Random column access is allowed.
Burst read operation can be interrupted by precharge of the same bank. READ to PRE interval is
CL=2.0
A0-9,11,12
Command
BA0,1
/CLK
DQS
CLK
A10
DQ
Command
Command
Command
READ READ
Preliminary
/CLK
Preliminary
DQS
DQS
DQS
CLK
00
Yi
DQ
DQ
DQ
0
00
Yj
0
Read Interrupted by Precharge (BL=8)
READ PRE
Read Interrupted by Read (BL=8, CL=2)
READ
READ
Qai0 Qai1 Qaj0 Qaj1 Qaj2 Qaj3 Qak0 Qak1 Qak2 Qak3 Qak4 Qak5 Qal0 Qal1 Qal2 Qal3 Qal4 Qal5 Qal6 Qal7
READ
10
Yk
0
PRE
Q0
Q0
Q0
256M Double Data Rate Synchronous DRAM
Q1
Q1
Q1
PRE
Q2
Q2
READ
Q3
Q3
01
Yl
0
Q4
Q5
A3S56D30/40ETP
29

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