IS43R16160B-6TL INTEGRATED SILICON SOLUTION (ISSI), IS43R16160B-6TL Datasheet - Page 33

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IS43R16160B-6TL

Manufacturer Part Number
IS43R16160B-6TL
Description
SDRAM, DDR, 16M X 16, 2.5V, 66TSOP2
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS43R16160B-6TL

Access Time
0.7ns
Page Size
256Mbit
Memory Case Style
TSOP-2
No. Of Pins
66
Operating Temperature Range
0°C To +70°C
Memory Type
DRAM - Synchronous
Memory Configuration
4 BLK (4M X 16)
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS43R83200B
IS43R16160B, IC43R16160B
Integrated Silicon Solution, Inc.
Rev. B
10/31/08
[Write interrupted by Read]
[Write interrupted by Write]
access is allowed. Internal WRITE to READ command interval(tWTR) is minimum 1 CLK. The
input data on DQ at the interrupting READ cycle is "don't care". tWTR is referenced from the first
positive edge after the last data input.
Burst write operation can be interrupted by write of any bank. Random column access is allowed.
WRITE to WRITE interval is minimum 1 CLK.
Burst write operation can be interrupted by read of the same or the other bank. Random column
Command
A0-9,11,12
Command
A0-9,11,12
BA0,1
BA0,1
/CLK
DQS
/CLK
CLK
A10
CLK
A10
DQ
DM
DQ
QS
WRITE
WRITE
Yi
00
Yi
00
0
0
WRITE
Dai0
Yj
00
Dai0 Dai1
0
Dai1
Daj0
Write Interrupted by Read (BL=8, CL=2.5)
Write Interrupted by Write (BL=8)
tWTR
Daj1
WRITE
READ
Daj2
Yk
10
Yj
00
0
0
Daj3
Dak0
Dak1
Dak2
Dak3
WRITE
Qaj0
Dak4
Yl
00
0
Dak5
Qaj1 Qaj2 Qaj3
Dal0
Dal1
Qaj4 Qaj5 Qaj6
Dal2 Dal3
Dal4
Qaj7
Dal5 Dal6
Dal7
33

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