PIC24FJ256GA106-I/MR Microchip Technology, PIC24FJ256GA106-I/MR Datasheet - Page 120

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64

PIC24FJ256GA106-I/MR

Manufacturer Part Number
PIC24FJ256GA106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GA106-I/MR

Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC24FJ256GA110 FAMILY
REGISTER 8-3:
8.4
With few limitations, applications are free to switch
between any of the four clock sources (POSC, SOSC,
FRC and LPRC) under software control and at any
time. To limit the possible side effects that could result
from this flexibility, PIC24F devices have a safeguard
lock built into the switching process.
DS39905E-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-6
bit 5-0
Note 1:
Note:
U-0
U-0
Clock Switching Operation
Increments or decrements of TUN<5:0> may not change the FRC frequency in equal steps over the FRC
tuning range and may not be monotonic.
The Primary Oscillator mode has three
different submodes (XT, HS and EC)
which are determined by the POSCMDx
Configuration bits. While an application
can switch to and from Primary Oscillator
mode in software, it cannot switch
between the different primary submodes
without reprogramming the device.
Unimplemented: Read as ‘0’
TUN<5:0>: FRC Oscillator Tuning bits
011111 = Maximum frequency deviation
011110 =
000001 =
000000 = Center frequency, oscillator is running at factory calibrated frequency
111111 =
100001 =
100000 = Minimum frequency deviation
U-0
U-0
OSCTUN: FRC OSCILLATOR TUNE REGISTER
W = Writable bit
‘1’ = Bit is set
TUN5
R/W-0
U-0
(1)
TUN4
R/W-0
U-0
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TUN3
R/W-0
8.4.1
To enable clock switching, the FCKSM1 Configuration
bit in CW 2 must be programmed to ‘0’. (Refer to
Section 25.1 “Configuration Bits”
If the FCKSM1 Configuration bit is unprogrammed (‘1’),
the clock switching function and Fail-Safe Clock Monitor
function are disabled; this is the default setting.
The NOSCx control bits (OSCCON<10:8>) do not
control the clock selection when clock switching is dis-
abled. However, the COSCx bits (OSCCON<14:12>)
will reflect the clock source selected by the FNOSCx
Configuration bits.
The OSWEN control bit (OSCCON<0>) has no effect
when clock switching is disabled; it is held at ‘0’ at all
times.
U-0
(1)
ENABLING CLOCK SWITCHING
TUN2
R/W-0
U-0
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
TUN1
R/W-0
U-0
(1)
for further details.)
TUN0
R/W-0
U-0
(1)
bit 8
bit 0

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