PIC16F1827-I/ML Microchip Technology, PIC16F1827-I/ML Datasheet - Page 31
![IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F1827-I/ML
Manufacturer Part Number
PIC16F1827-I/ML
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1826-IP.pdf
(406 pages)
3.PIC16F1826-IP.pdf
(12 pages)
4.PIC16F1826-IP.pdf
(8 pages)
5.PIC16F1826-IP.pdf
(40 pages)
6.PIC16LF1827-ISS.pdf
(400 pages)
Specifications of PIC16F1827-I/ML
Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
384Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
4kWords
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16F1826-IP PDF datasheet #2
- PIC16F1826-IP PDF datasheet #3
- PIC16F1826-IP PDF datasheet #4
- PIC16F1826-IP PDF datasheet #5
- PIC16LF1827-ISS PDF datasheet #6
- Current page: 31 of 400
- Download datasheet (7Mb)
TABLE 3-8:
© 2009 Microchip Technology Inc.
080h
081h
082h
083h
084h
085h
086h
087h
088h
089h
08Ah
08Bh
08Ch
08Dh
08Eh
08Fh
090h
091h
092h
093h
094h
095h
096h
097h
098h
099h
09Ah
09Bh
09Ch
09Dh
09Eh
09Fh
Legend:
Note 1:
Address
Bank 1
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
2:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
TRISA
TRISB
—
—
—
PIE1
PIE2
PIE3
PIE4
OPTION_REG
PCON
WDTCON
OSCTUNE
OSCCON
OSCSTAT
ADRESL
ADRESH
ADCON0
ADCON1
—
PIC16F/LF1827 only.
These registers can be addressed from any bank.
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
(1)
(1)
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
A/D Result Register Low
A/D Result Register High
Unimplemented
TMR1GIE
STKOVF
T1OSCR
SPLLEN
WPUEN
TRISA7
TRISB7
OSFIE
ADFM
Bit 7
GIE
—
—
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
STKUNF
INTEDG
TRISA6
TRISB6
ADCS2
IRCF3
CHS4
PLLR
PEIE
ADIE
Bit 6
C2IE
—
—
—
—
—
—
TMR0CS
WDTPS4
TMR0IE
CCP4IE
TRISA5
TRISB5
ADCS1
IRCF2
OSTS
TUN5
CHS3
RCIE
Bit 5
C1IE
—
—
—
—
Preliminary
TMR0SE
WDTPS3
HFIOFR
CCP3IE
TRISA4
TRISB4
ADCS0
IRCF1
CHS2
BSR4
TUN4
Bit 4
INTE
TXIE
EEIE
TO
—
—
WDTPS2
TMR6IE
RMCLR
HFIOFL
TRISA3
TRISB3
SSP1IE
BCL1IE
IRCF0
IOCIE
BSR3
TUN3
CHS1
Bit 3
PSA
PD
—
—
PIC16F/LF1826/27
WDTPS1
ADNREF
MFIOFR
TMR0IF
TRISA2
TRISB2
CCP1IE
CHS0
BSR2
TUN2
Bit 2
PS2
—
—
—
RI
—
Z
WDTPS0
GO/DONE
ADPREF1 ADPREF0 0000 -000 0000 -000
TMR2IE
TRISA1
TRISB1
TMR4IE
BCL2IE
LFIOFR
BSR1
TUN1
SCS1
INTF
Bit 1
POR
PS1
DC
—
CCP2IE
SWDTEN --01 0110 --01 0110
TMR1IE
HFIOFS
TRISA0
TRISB0
SSP2IE
ADON
IOCIF
BSR0
TUN0
SCS0
Bit 0
BOR
PS0
—
C
DS41391B-page 31
(1)
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
1111 1111 1111 1111
1111 1111 1111 1111
0000 0000 0000 0000
0000 0--0 0000 0--0
--00 0-0- --00 0-0-
---- --00 ---- --00
1111 1111 1111 1111
00-- 11qq qq-- qquu
--00 0000 --00 0000
0011 1-00 0011 1-00
10q0 0q00 qqqq qq0q
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
-000 0000 -000 0000
POR, BOR
Value on:
—
—
—
—
Value on all
resets
other
—
—
—
—
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