UPD78F1154GK-GAK-AX NEC, UPD78F1154GK-GAK-AX Datasheet - Page 36

16BIT MCU, 128K FLASH, 8K RAM, SMD

UPD78F1154GK-GAK-AX

Manufacturer Part Number
UPD78F1154GK-GAK-AX
Description
16BIT MCU, 128K FLASH, 8K RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F1154GK-GAK-AX

Controller Family/series
UPD78F
No. Of I/o's
70
Ram Memory Size
8192Byte
Cpu Speed
20MHz
No. Of Timers
9
No. Of
RoHS Compliant
Core Size
16bit
Program Memory Size
128KB
Oscillator Type
External, Internal

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Part Number:
UPD78F1154GK-GAK-AX
Manufacturer:
NEC
Quantity:
100
36
<Functions of each channel when it operates with another channel>
(1) PWM (Pulse Width Modulator) output
(2) One-shot pulse output
(3) Multiple PWM (Pulse Width Modulator) output
<LIN-bus supporting function (channel 7 only)>
(1) Detection of wakeup signal
(2) Detection of sync break field
(3) Measurement of pulse width of sync field
reference timer that controls cycles) and the slave channels (timers that operate following the master channel) in
combination.
Combination operation functions are those functions that are attained by using the master channel (mostly the
Two channels are used as a set to generate a pulse with a specified period and a specified duty factor.
Two channels are used as a set to generate a one-shot pulse with a specified delay time and a specified pulse
width.
By extending the PWM function and using one master channel and two or more slave channels, up to seven
types of PWM signals that have a specific period and a specified duty factor can be generated.
The timer starts counting at the falling edge of a signal input to the serial data input pin (RxD3) of UART3 and
the count value of the timer is captured at the rising edge. In this way, a low-level width can be measured. If
the low-level width is greater than a specific value, it is recognized as a wakeup signal.
The timer starts counting at the falling edge of a signal input to the serial data input pin (RxD3) of UART3 after
a wakeup signal is detected, and the count value of the timer is captured at the rising edge. In this way, a low-
level width is measured. If the low-level width is greater than a specific value, it is recognized as a sync break
field.
After a sync break field is detected, the low-level width and high-level width of the signal input to the serial data
input pin (RxD3) of UART3 are measured. From the bit interval of the sync field measured in this way, a baud
rate is calculated.
Preliminary Product Information U17892EJ2V0PM
78K0R/KF3

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