PIC24FJ256GB106-I/MR Microchip Technology, PIC24FJ256GB106-I/MR Datasheet - Page 50

• Manufacturer Part Number: PIC24FJ256GB106-I/MR
• Description: IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB106-I/MR

• Controller Family/series: PIC24
• No. Of I/o's: 51
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Core Size: 16 Bit
• Program Memory Size: 256KB
• Peripherals: ADC, Comparator, PWM, RTC, Timer
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-10:
TABLE 4-11:
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
U2MODE
U2STA
U2TXREG
U2RXREG
U2BRG
U3MODE
U3STA
U3TXREG
U3RXREG
U3BRG
U4MODE
U4STA
U4TXREG
U4RXREG
U4BRG
Legend:
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
SPI2STAT
SPI2CON1
SPI2CON2
SPI2BUF
SPI3STAT
SPI3CON1
SPI3CON2
SPI3BUF
Legend:
File Name
File Name
Addr
0220
0222
0224
0226
0228
0230
0232
0234
0236
0238
0250
0252
0254
0256
0258
02B0
02B2
02B4
02B6
02B8
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
0240
0242
0244
0248
0260
0262
0264
0268
0280
0282
0284
0288
UTXISEL1 UTXINV UTXISEL0
UTXISEL1 UTXINV UTXISEL0
UTXISEL1 UTXINV UTXISEL0
UTXISEL1 UTXINV UTXISEL0
UART REGISTER MAPS
UARTEN
UARTEN
UARTEN
UARTEN
SPI REGISTER MAPS
FRMEN
FRMEN
FRMEN
SPIEN
SPIEN
SPIEN
Bit 15
Bit 15
—
—
—
—
—
—
—
—
—
—
—
SPIFSD
SPIFSD
SPIFSD
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPIFPOL
SPIFPOL
SPIFPOL
SPISIDL
SPISIDL
SPISIDL
Bit 13
USIDL
USIDL
USIDL
USIDL
Bit 13
—
—
—
—
—
—
—
—
—
—
—
DISSCK
DISSCK
DISSCK
Bit 12
Bit 12
IREN
IREN
IREN
IREN
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
UTXBRK
UTXBRK
UTXBRK
UTXBRK
RTSMD
RTSMD
RTSMD
RTSMD
DISSDO MODE16
DISSDO MODE16
DISSDO MODE16
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPIBEC2 SPIBEC1 SPIBEC0
SPIBEC2 SPIBEC1 SPIBEC0
SPIBEC2 SPIBEC1 SPIBEC0
UTXEN
UTXEN
UTXEN
UTXEN
Bit 10
Bit 10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
UTXBF
UTXBF
UTXBF
UTXBF
UEN1
UEN1
UEN1
UEN1
Bit 9
Baud Rate Generator Prescaler Register
Baud Rate Generator Prescaler Register
Baud Rate Generator Prescaler Register
Baud Rate Generator Prescaler Register
Bit 9
SMP
SMP
SMP
—
—
—
—
—
—
—
—
—
—
—
Transmit and Receive Buffer
Transmit and Receive Buffer
Transmit and Receive Buffer
TRMT
TRMT
TRMT
TRMT
UEN0
UEN0
UEN0
UEN0
Bit 8
Bit 8
CKE
CKE
CKE
—
—
—
URXISEL1 URXISEL0
URXISEL1 URXISEL0
URXISEL1 URXISEL0
URXISEL1 URXISEL0
WAKE
WAKE
WAKE
WAKE
SRMPT
SRMPT
SRMPT
Bit 7
SSEN
SSEN
SSEN
Bit 7
—
—
—
SPIROV SRXMPT
SPIROV SRXMPT
SPIROV SRXMPT
LPBACK
LPBACK
LPBACK
LPBACK
Bit 6
Bit 6
CKP
CKP
CKP
—
—
—
MSTEN
MSTEN
MSTEN
ADDEN
ADDEN
ADDEN
ADDEN
ABAUD
ABAUD
ABAUD
ABAUD
Bit 5
Bit 5
—
—
—
Transmit Register
Transmit Register
Transmit Register
Transmit Register
Receive Register
Receive Register
Receive Register
Receive Register
SISEL2
SISEL2
SISEL2
SPRE2
SPRE2
SPRE2
RXINV
RIDLE
RXINV
RIDLE
RXINV
RIDLE
RXINV
RIDLE
Bit 4
Bit 4
—
—
—
SISEL1
SPRE1
SISEL1
SPRE1
SISEL1
SPRE1
BRGH
PERR
BRGH
PERR
BRGH
PERR
BRGH
PERR
Bit 3
Bit 3
—
—
—
PDSEL1
PDSEL1
PDSEL1
PDSEL1
SISEL0
SISEL0
SISEL0
SPRE0
SPRE0
SPRE0
FERR
FERR
FERR
FERR
Bit 2
Bit 2
—
—
—
PDSEL0
PDSEL0
PDSEL0
PDSEL0
SPITBF
SPITBF
SPITBF
PPRE1
PPRE1
PPRE1
OERR
OERR
OERR
OERR
SPIFE
SPIFE
SPIFE
Bit 1
Bit 1
URXDA
URXDA
URXDA
URXDA
SPIRBF
SPIBEN
SPIRBF
SPIBEN
SPIRBF
SPIBEN
STSEL
STSEL
STSEL
STSEL
PPRE0
PPRE0
PPRE0
Bit 0
Bit 0
Resets
Resets
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
All
All