CS4362-KQZ Cirrus Logic Inc, CS4362-KQZ Datasheet - Page 28

• Manufacturer Part Number: CS4362-KQZ
• Description: IC,Audio Processor,QFP,48PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS4362-KQZ

• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 6
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 390mW
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1644

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6. APPLICATIONS
6.1
6.2
6.3
6.4
6.5
Grounding and Power Supply Decoupling
As with any high resolution converter, the CS4362 requires careful attention to power supply and grounding
arrangements to optimize performance.
VA, VD, VLS and VLC connected to clean supplies. Decoupling capacitors should be located as close to
the device package as possible. If desired, all supply pins may be connected to the same supply, but a de-
coupling capacitor should still be placed on each supply pin (see
ommended voltages).
PCM Mode Select
The CS4362 operates in one of three PCM oversampling modes based on the input sample rate. Mode se-
lection is determined by the M3 and M2 pins in Stand-Alone Mode or the FM bits in Control Port Mode. Sin-
gle-Speed Mode supports input sample rates up to 50 kHz and uses a 128x oversampling ratio. Double-
Speed Mode supports input sample rates up to 100 kHz and uses an oversampling ratio of 64x. Quad-
Speed Mode supports input sample rates up to 200 kHz and uses an oversampling ratio of 32x. The PCM
digital interface format is determined by the M1 and M0 pins in Stand-Alone Mode or the DIF bits in Control
Port Mode.
In Stand-Alone Mode, the states of these pins are continually scanned for any changes; however, the mode
should only be changed while the device is in reset (RST pin low) to ensure proper switching from one mode
to another.
Recommended Power-Up Sequence
1. Hold RST low until the power supply, master, and left/right clocks are stable. In this state, the control
2. Bring RST high. The device will remain in a low power state with VQ low and will initiate the Stand-Alone
3. If Control Port Mode is selected via the CPEN bit, set the RMP_UP and RMP_DN bits in registers 03h
Analog Output and Filtering
The application note “Design Notes for a 2-Pole Filter with Differential Input” discusses the second-order
Butterworth filter and differential to single-ended converter which was implemented on the CS4362 evalua-
tion board, CDB4362, as seen in
tion for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on
the external analog circuitry.
Interpolation Filter
To accommodate the increasingly complex requirements of digital audio systems, the CS4362 incorporates
selectable interpolation filters for each mode of operation. A “fast” and a “slow” roll-off filter is available in
each of Single-, Double-, and Quad-Speed Modes. These filters have been designed to accommodate a
port is reset to its default settings and VQ will remain low.
power-up sequence. The control port will be accessible at this time. If Control Port operation is desired,
write the CPEN bit prior to the completion of the Stand-Alone power-up sequence, approximately 512
LRCK cycles in Single-Speed Mode (1024 LRCK cycles in Double-Speed Mode, and 2048 LRCK cycles
in Quad-Speed Mode). Writing this bit will halt the Stand-Alone power-up sequence and initialize the
control port to its default settings. The desired register settings can be loaded while keeping the PDN
bit set to 1.
and 04h to 1, set the format and mode control bits to the desired settings, and then set the PDN bit to
0 which will initiate the power-up sequence.
Figure
Figures 5
42. The CS4362 does not include phase or amplitude compensa-
and
6
show the recommended power arrangement with
Characteristics and Specifications
CS4362
DS257F2
for rec-