AD7143ACPZ Analog Devices Inc, AD7143ACPZ Datasheet - Page 40

IC, CDC, 16BIT, SMD, LFCSP-16, 7143

AD7143ACPZ

Manufacturer Part Number
AD7143ACPZ
Description
IC, CDC, 16BIT, SMD, LFCSP-16, 7143
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7143ACPZ

Supply Voltage Range
2.6V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LFCSP
No. Of Pins
16
Svhc
No SVHC (18-Jun-2010)
Package / Case
LFCSP
Base Number
7143
Ic Function
Programmable Controller For Capacitance Touch Sensors
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD7143
Table 23. STAGE_COMPLETE_INT_EN Register
Address
0x007
Table 24. STAGE_LOW_LIMIT_INT Register
Address
0x008
1
Registers self-clear to 0 after readback, provided that the limits are not exceeded.
Data Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[11:8]
[12]
[15:13]
Data Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[15:8]
Default
0
0
0
0
0
0
0
0
0
0
Default
0
0
0
0
0
0
0
0
R
Type
R/W
Type
Name
STAGE0_LOW_LIMIT_INT
STAGE1_LOW_LIMIT_INT
STAGE2_LOW_LIMIT_INT
STAGE3_LOW_LIMIT_INT
STAGE4_LOW_LIMIT_INT
STAGE5_LOW_LIMIT_INT
STAGE6_LOW_LIMIT_INT
STAGE7_LOW_LIMIT_INT
Unused
Name
STAGE0_COMPLETE_EN
STAGE1_COMPLETE_EN
STAGE2_COMPLETE_EN
STAGE3_COMPLETE_EN
STAGE4_COMPLETE_EN
STAGE5_COMPLETE_EN
STAGE6_COMPLETE_EN
STAGE7_COMPLETE_EN
Unused
TESTMODE
Unused
1
Rev. 0 | Page 40 of 56
Description
STAGE0 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE0 conversion
STAGE1 conversion interrupt control
STAGE2 conversion interrupt control
STAGE3 conversion interrupt control
STAGE4 conversion interrupt control
STAGE5 conversion interrupt control
STAGE6 conversion interrupt control
STAGE7 conversion interrupt control
Set unused register bits = 0
Set test mode register bits = 0 at all times
Set unused register bits = 0
Description
STAGE0 CDC conversion low limit interrupt result
1 indicates STAGE0_LOW_THRESHOLD value exceeded
STAGE1 CDC conversion low limit interrupt result
1 indicates STAGE1_LOW_THRESHOLD value exceeded
STAGE2 CDC conversion low limit interrupt result
1 indicates STAGE2_LOW_THRESHOLD value exceeded
STAGE3 CDC conversion low limit interrupt result
1 indicates STAGE3_LOW_THRESHOLD value exceeded
STAGE4 CDC conversion low limit interrupt result
1 indicates STAGE4_LOW_THRESHOLD value exceeded
STAGE5 CDC conversion low limit interrupt result
1 indicates STAGE5_LOW_THRESHOLD value exceeded
STAGE6 CDC conversion low limit interrupt result
1 indicates STAGE6_LOW_THRESHOLD value exceeded
STAGE7 CDC conversion low limit interrupt result
1 indicates STAGE7_LOW_THRESHOLD value exceeded
Set unused register bits = 0
0 = interrupt source disabled
1 = INT asserted at completion of STAGE1 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE3 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE6 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE7 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE2 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE4 conversion
0 = interrupt source disabled
1 = INT asserted at completion of STAGE5 conversion

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