P87LPC761BN NXP Semiconductors, P87LPC761BN Datasheet - Page 48

• Manufacturer Part Number: P87LPC761BN
• Description: IC, MCU 8BIT 80C51 2K OTP, DIP16
• Manufacturer: NXP Semiconductors

Specifications of P87LPC761BN

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 14
• Program Memory Size: 2KB
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• Oscillator Type: External, Internal
• No. Of Timers: 2
• Digital: RoHS Compliant
• Package: 16PDIP
• Device Core: 80C51
• Family Name: 87LP
• Maximum Speed: 20 MHz
• Ram Size: 128 Byte
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 14
• Interface Type: I2C/UART
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 2

signature bytes designate the device as an P87LPC761 manufactured
with a serial programming method. Commands, addresses, and data
Philips Semiconductors
EPROM Characteristics
Programming of the EPROM on the P87LPC761 is accomplished
are transmitted to and from the device on two pins after
programming mode is entered. Serial programming allows easy
implementation of in-circuit programming of the P87LPC761 in an
application board.
The P87LPC761 contains three signature bytes that can be read and
used by an EPROM programming system to identify the device. The
by Philips. The signature bytes may be read by the user program at
addresses FC30h, FC31h and FC60h with the MOVC instruction,
using the DPTR register for addressing.
A special user data area is also available for access via the MOVC
instruction at addresses FCE0h through FCFFh. This “customer
code” space is programmed in the same manner as the main code
EPROM and may be used to store a serial number, manufacturing
date, or other application information.
2002 Mar 07
Low power, low price, low pin count (16 pin)
microcontroller with 2 kbyte OTP
UCFG1
UCFG1.6
BIT
UCFG1.7
UCFG1.5
UCFG1.4
UCFG1.3
UCFG1.2–0 FOSC2–FSOC0
Address: FD00h
FOSC2–FOSC0
SYMBOL
WDTE
1 1 1
0 1 1
0 1 0
0 0 1
0 0 0
CLKR
PRHI
RPD
BOV
WDTE
7
Figure 39. EPROM System Configuration Byte 1 (UCFG1)
RPD
FUNCTION
Watchdog timer enable. When programmed (0), disables the watchdog timer. The timer may
still be used to generate an interrupt.
Reset pin disable. When 1 disables the reset function of pin P1.5, allowing it to be used as an
input only port pin.
Port reset high. When 1, ports reset to a high state. When 0, ports reset to a low state.
Brownout voltage select. When 1, the brownout detect voltage is 2.5V. When 0, the brownout
detect voltage is 3.8V. This is described in the Power Monitoring Functions section.
Clock rate select. When 0, the CPU clock rate is divided by 2. This results in machine cycles
taking 12 CPU clocks to complete as in the standard 80C51. For full backward compatibility,
this division applies to peripheral timing as well.
CPU oscillator type select. See Oscillator section for additional information. Combinations
other than those shown below should not be used. They are reserved for future use.
Oscillator Configuration
External clock input on X1 (default setting for an unprogrammed part).
Internal RC oscillator, 6 MHz. For tolerance, see AC Electrical Characteristics table.
Low frequency crystal, 20 kHz to 100 kHz.
Medium frequency crystal or resonator, 100 kHz to 4 MHz.
High frequency crystal or resonator, 4 MHz to 20 MHz.
6
PRHI
5
BOV
4
45
32-Byte Customer Code Space
A small supplemental EPROM space is reserved for use by the
customer in order to identify code revisions, store checksums, add a
serial number to each device, or any other desired use. This area
exists in the code memory space from addresses FCE0h through
FCFFh. Code execution from this space is not supported, but it may
be read as data through the use of the MOVC instruction with the
appropriate addresses. The memory may be programmed at the
same time as the rest of the code memory and UCFG bytes are
programmed.
System Configuration Bytes
A number of user configurable features of the P87LPC761 must be
defined at power up and therefore cannot be set by the program after
start of execution. Those features are configured through the use of
two EPROM bytes that are programmed in the same manner as the
EPROM program space. The contents of the two configuration bytes,
UCFG1 and UCFG2, are shown in Figures 39 and 40. The values of
these bytes may be read by the program through the use of the
MOVX instruction at the addresses shown in the figure.
CLKR
3
FOSC2
2
FOSC1
1
FOSC0
0
Unprogrammed Value: FFh
P87LPC761
Preliminary data
SU01477