CS5529-AS Cirrus Logic Inc, CS5529-AS Datasheet

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CS5529-AS

Manufacturer Part Number
CS5529-AS
Description
A/D Converter (A-D) IC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5529-AS

Peak Reflow Compatible (260 C)
No
Termination Type
SMD
No. Of Bits
16 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
No. Of Channels
2
Interface Type
Serial
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
Features
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l
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Delta-Sigma Analog-to-Digital Converter
- Linearity Error: 0.0015%FS
- Noise Free Resolution: 16-Bits
2.5 V Bipolar/Unipolar Buffered Input Range
6-Bit Output Latch
Eight Digital Filters
- Selectable Output Word Rates
- Output Settles in One Conversion Cycle
- 50/60 Hz ±3 Hz Simultaneous Rejection
Simple three-wire serial interface
- SPI™ and Microwire™ Compatible
- Schmitt Trigger on Serial Clock (SCLK)
System/Self-Calibration with R/W Registers
Power Supply Configurations
- VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V
- VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V
Low Power Consumption: 2.5 mW
VREF+
VREF-
AIN+
AIN-
16-Bit, Programmable
A0 A1 D0 D1 D2 D3
1X
1X
Latch
VA+
VA-
Calibration
Memory
Delta-Sigma
Differential
Modulator
4th Order
Copyright
Calibration C
General Description
The 16-bit CS5529 is a low-power programmable
alog-to-Digital
coarse/fine charge buffers, a fourth order
a calibration microcontroller, a digital filter with program-
mable decimation rates, a 6-bit output latch, and a three-
wire serial interface. The ADC is designed to operate
from single or dual analog supplies and a single digital
supply.
The digital filter is programmable with output update
rates between 1.88 Hz to 101 Hz. These output rates are
specified for XIN = 32.768 kHz. Output word rates can be
increased by approximately 3X by using XIN = 100 kHz.
The filter is designed to settle to full accuracy for the se-
lected output word rate in one conversion. When
operated at word rates of 15 Hz or less, the filter rejects
both 50 Hz and 60 Hz simultaneously.
Low power, single conversion settling time, programma-
ble output rates, and the ability to handle negative input
signals make this single or dual supply product an ideal
solution for isolated and non-isolated applications.
ORDERING INFORMATION
(All Rights Reserved)
ADC with 6-Bit Latch
See page 27.
Cirrus Logic, Inc. 1999
Digital Filter
DGND
XIN
Converter
Clock
Gen.
XOUT
(ADC)
Calibration
Register
Register
Register
Control
Output
VD+
CS5529
which
modulator,
DS246F1
MAR ‘99
includes
SDO
CS
SCLK
SDI
An-
1

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CS5529-AS Summary of contents

Page 1

... FAX: (512) 445 7581 http://www.crystal.com ADC with 6-Bit Latch General Description The 16-bit CS5529 is a low-power programmable alog-to-Digital coarse/fine charge buffers, a fourth order a calibration microcontroller, a digital filter with program- mable decimation rates, a 6-bit output latch, and a three- wire serial interface ...

Page 2

... Single Conversion ........................................................................ 21 Continuous Conversions .............................................................. 21 Output Coding .................................................................................... 22 Power Supply Arrangements .................................................................... 23 PCB Layout .............................................................................................. 24 PIN DESCRIPTIONS ......................................................................................... 25 Clock Generator......................................................................................... 25 Control Pins and Serial Data I/O................................................................ 25 Measurement and Reference Inputs ......................................................... 26 Power Supply Connections........................................................................ 26 SPECIFICATION DEFINITIONS ........................................................................ 27 ORDERING GUIDE ............................................................................................ 27 PACKAGE DIMENSIONS ................................................................................. 28 2 Offset Register ...................................................................... 17 Gain Register ........................................................................ 18 CS5529 DS246F1 ...

Page 3

... System Calibration of Gain........................................................................ 19 CS5529 Configured with a +5.0 V Analog Supply..................................... 23 CS5529 Configured with ±2.5 V Analog Supplies. .................................... 23 SPI™ trademark of Motorola Inc., Microwire™ trademark of National Semiconductor Corp. Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor- mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the infor- mation contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “ ...

Page 4

... For peak-to-peak noise multiply by 6.6 for all ranges and output rates. Specifications are subject to change without notice °C; VA± = ±2.5 V ±5%, VD ±5%, VREF (Note 3) (Note 3) (Notes 3 and 4) (Note Filter Frequency (Hz) 1.64 3.27 6.55 12.7 25.4 50.4 70.7 84.6 CS5529 Min Typ Max - ±0.0015 ±0.003 ±1 ±2 LSB - ±2 ±4 LSB - ...

Page 5

... VREF must be less than or equal to supply voltages. 10. All outputs unloaded. All inputs CMOS levels. DS246F1 (Continued) Min (Bipolar/Unipolar Mode) 0.0 VA (Note 7) - (Note 8) 1.0 (Bipolar/Unipolar Mode) - (Note 9) 1.0 VA- VA (Note (Note 10 modulator’s 1’s density range. See CS5529 Typ Max Unit - VA VA+ V 120 - dB 120 - 3 ±1. VA+ ...

Page 6

... XIN (VD+)-0 SCLK (VD+)-0. XIN, SCLK V IL XIN V IL SCLK V IL SDO -400 µA V (VD+)-0.3 out OH (VD+)-1.0 SDO -5 out OH SDO 400 µA V out OL SDO 5 out out Symbol CS5529 Min Typ Max Unit - - ±1 ±10 µ ±10 µ ...

Page 7

... V) (See Note 13.) Symbol (Notes 14 and 15) Positive Digital VD+ Positive Analog VA+ Negative Analog VA- (Notes 16 and 17 OUT (Note 18) PDN AIN and VREF pins V INA V IND stg +6.0 V. +7.75 V. CS5529 Min Typ Max -0.3 - +6.0 -0.3 - +6.0 -6 ± ± (VA-) + (-0.3) - (VA+)+0.3 -0.3 - (VD+)+0 ...

Page 8

... L Symbol (Note19) (Note 20) Any Digital Input Except SCLK SCLK Any Digital Output (Note 20) Any Digital Input Except SCLK SCLK Any Digital Output XTAL = 32.768 kHz (Note 21) Pulse Width High Pulse Width Low CS5529 Min Typ Max XIN 30 32.768 100 rise - - 1 ...

Page 9

... CS t3 SCLK CS t3 SDI MSB MSB-1 t4 SCLK CS t7 SDO MSB t8 SCLK DS246F1 t1 t2 Continuous Running SCLK Timing (Not to Scale SDI Write Timing (Not to Scale) MSB-1 t1 SDO Read Timing (Not to Scale) t6 LSB t6 t2 LSB t2 CS5529 t9 9 ...

Page 10

... Hz and 60 Hz line interference simultaneously. Analog Input The CS5529 provides a nominal 2.5 V input span when the gain register is 1.0 decimal and the differ- ential reference voltage between VREF+ and VREF- is 2.5 V. The gain registers content is used during calibration to set the gain slope of the ADC’ ...

Page 11

... The differential voltage between VREF+ and VREF- sets the nominal full scale input span of the converter. For a single-ended reference voltage, such as the LT1019-2.5, the reference output is connected to the VREF+ pin of the CS5529 and the ground reference for the LT1019-2.5 is connected to the VREF- pin. Serial Port ...

Page 12

... Read from selected register. 000 Offset Register 001 Gain Register 010 Configuration Register 011 Conversion Data Register (read only) 100 Set-up Registers (Offset, Gain, Configuration) 101 Reserved 110 Reserved 111 Reserved 0 Run 1 Power Save Table 1. Command Set CS5529 D0 PS/R FUNCTION PS DS246F1 ...

Page 13

... Serial Port Interface The CS5529’s serial interface consists of four con- trol lines: CS, SDI, SDO, and SCLK. CS, Chip Select, is the control line which enables access to the serial port. If the CS pin is tied to logic 0, the port can function as a three wire interface. ...

Page 14

... SCLKs for Set-up Registers) Write Cycle MSB Data Time 24 SCLKs (or 72 SCLKs for Set-up Registers) Read Cycle SCLKs Clear SDO Flag SDO Continuous Conversion Read (PF bit = 1) Figure 4. Command and Data Word Timing. CS5529 LSB LSB XIN/OWR Clock Cycles MSB LSB Data Time 24 SCLKs DS246F1 ...

Page 15

... It only resets the serial port to the command mode. System Initialization When power to the CS5529 is applied, the chip is held in a reset condition until the 32.768 kHz oscil- lator has started and a counter-timer elapses. Due to the high Q of the 32.768 kHz crystal, the oscillator takes 400-600 ms to start ...

Page 16

... OWR doubles and the filter’s corner frequency moves to 25.4 Hz. Clock Generator The CS5529 includes a gate which can be connect- ed with an external crystal to provide the master clock for the chip. The chip is designed to operate using a low-cost 32.768 kHz “tuning fork” type crystal ...

Page 17

... Reading the configuration register alone will not clear the DF bit. 2) After the CS5529 is reset, the converter is functional and can perform measurements without being calibrated. In this case, the converter will utilize the initialized values of the on-chip registers (Gain = 1 ...

Page 18

... MSB- 22). 0 Self Calibration The CS5529 offers both self offset and self gain calibrations. For the self-calibration of offset, the converter internally ties the inputs of the modulator together and routes them to the VREF- pin as shown in Figure 6. Also self offset calibration re- quires that VREF- be tied to a fixed voltage be- tween VA+ and VA- ...

Page 19

... Factory calibration can be performed in a user’s system by using the system calibration capabilities of the CS5529. After the ADC is calibrated in the user’s system, the offset and gain register contents can be read by the system microcontroller and re- corded in EEPROM. These same calibration words ...

Page 20

... R Normal operation (no calibration) 001 Offset -- Self-Calibration 010 Gain -- Self-Calibration 011 Offset self-cal followed by Gain self-calibration 100 Not Used. 101 Offset -- System Calibration 110 Gain -- System Calibration 111 Not Used. CS5529 D16 D15 D14 D13 LPM WR2 WR1 WR0 PSS DF CC2 ...

Page 21

... Performing Conversions The CS5529 offers two modes of performing con- versions: single conversion and continuous conver- sions. The sections that follow detail the differences and provides examples illustrating how to use the modes. Note that it is assumed that the configuration register has been initialized before conversions are performed ...

Page 22

... The OD flag bit will be cleared to logic 0 when the modulator becomes sta- ble. Table 2 and Table 3 illustrate the output coding for the CS5529. Unipolar conversions are output in bi- nary format and bipolar conversions are output two’s complement. D20 ...

Page 23

... V Differential Inputs (Gain Register = 4.0) Common Mode = 0 to VA+ Logic Outputs: A0, A1 Switch from VA+ to VA- D0-D3 Switch from VD+ to DGND Figure 10. CS5529 Configured with a +5.0 V Analog Supply. +2.5 V Analog Supply ±2.5 V Differential Inputs (Gain Register = 1.0) ±1.25 V Differential Inputs (Gain Register = 2.0) ± ...

Page 24

... CS5529 connected with ±2.5 V bipolar analog supplies and digital supply to measure ground referenced bipolar signals. PCB Layout The CS5529 should be placed entirely over an ana- log ground plane with the DGND pin of the device connected to the analog ground plane. Place the an- 24 ...

Page 25

... VA+ VREF- AIN AIN SDI SDO VD+ SCLK 9 12 DGND 10 11 XOUT XIN CS5529 VOLTAGE REFERENCE INPUT VOLTAGE REFERENCE INPUT LOGIC OUTPUT (DIGITAL) LOGIC OUTPUT (DIGITAL) LOGIC OUTPUT (DIGITAL) SERIAL DATA INPUT SERIAL DATA OUTPUT POSITIVE DIGITAL POWER DIGITAL GROUND CRYSTAL IN 25 ...

Page 26

... Fully differential inputs which establish the voltage reference for the on-chip modulator. Power Supply Connections VA+ - Positive Analog Power, Pin 2. Positive analog supply voltage. VA- - Negative Analog Power, Pin 1. Negative analog supply voltage. VD+ - Positive Digital Power, Pin 13. Positive digital supply voltage (+3 V). DGND - Digital Ground, Pin 12. Digital Ground. 26 CS5529 DS246F1 ...

Page 27

... The deviation of the mid-scale transition (111...111 to 000...000) from the ideal (1/2 LSB below the voltage on the AIN- pin). When in bipolar mode (U/B bit = 0). Units are in LSBs. ORDERING GUIDE Model Number Linearity Error (Max) CS5529-AP CS5529-AS DS246F1 Temperature Range 0.003% - +85 C 0.003% ...

Page 28

... CS5529 SIDE VIEW MILLIMETERS MIN MAX 0.00 5.33 0.38 0.64 2.92 4.95 0.36 0.56 1.14 1.78 0.20 0.36 24 ...

Page 29

... MIN MAX -- 0.084 0.002 0.010 0.064 0.074 0.009 0.015 0.272 0.295 0.291 0.323 0.197 0.220 0.022 0.030 0.025 0.041 0° 8° CS5529 1 E1 END VIEW L MILLIMETERS NOTE MIN MAX -- 2.13 0.05 0.25 1.62 1.88 0.22 0.38 2,3 6.90 7.50 1 7.40 8.20 5 ...

Page 30

Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts ...

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