CS5529-AS Cirrus Logic Inc, CS5529-AS Datasheet - Page 22

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CS5529-AS

Manufacturer Part Number
CS5529-AS
Description
A/D Converter (A-D) IC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5529-AS

Peak Reflow Compatible (260 C)
No
Termination Type
SMD
No. Of Bits
16 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
No. Of Channels
2
Interface Type
Serial
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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the conversion data register again to exit the contin-
uous conversion mode.
Note:
Output Coding
As shown in the Output Conversion Data Register
Descriptions, the CS5529 presents output conver-
sions as a 24-bit conversion word. The first 16 bits
of the conversion word represent conversion data.
The third byte contains two error flag bits.
22
Note: VFS in the table equals the voltage between ground and full scale for any of the unipolar gain ranges,
MSB
Unipolar Input Voltage
D23
D11
3
or the voltage between
overrange conditions.
>(VFS-1.5 LSB)
1) If the user begins to clear the SDO flag and
read the conversion data, this action must be
finished before the conversion cycle which is
occurring in the background is complete if the
user wants to be able to read the new
conversion data. 2) If a CC command is
issued to the converter while it is performing
a conversion, the filter will stop the current
conversion and start a new convolution cycle
to perform a new conversion. 3) Continuous
conversions aren’t allowed unless the port
flag bit is set in the configuration register. 4)
The converter will remain in data mode and
continually perform conversions until the exit
command is issued (i.e. to exit the user must
read a register).
VFS/2-0.5 LSB
VFS-1.5 LSB
<(+0.5 LSB)
+0.5 LSB
D22
D10
14
2
Table 2. Output Conversion Data Register Description (16 bits + flags).
D21
D9
13
1
D20
LSB
full scale for any of the bipolar gain ranges. See text about error flags under
D8
12
Offset Binary
Table 3. CS5529 16-Bit Output Coding.
FFFF
FFFF
FFFE
7FFF
8000
0001
0000
0000
-----
-----
-----
D19
D7
11
1
D18
D6
10
1
Bipolar Input Voltage
<(-VFS+0.5 LSB)
>(VFS-1.5 LSB)
-VFS+0.5 LSB
VFS-1.5 LSB
In the third byte, D7-D4 are always logic 1; D3-D2
are always logic 0; and bits D1-D0 are the two flag
bits. The OF (Overrange Flag) bit is set to a logic 1
any time the input signal is: 1) more positive than
positive full scale, 2) more negative than zero (un-
ipolar mode), 3) more negative than negative full
scale (bipolar mode). It is cleared back to logic 0
whenever a conversion word occurs which is not
overranged.The OD (Oscillation Detect) bit is set to
a logic 1 any time that an oscillatory condition is de-
tected in the modulator. This does not occur under
normal operating conditions, but may occur when-
ever the input to the converter is extremely over-
ranged. If the OD bit is set, the conversion data bits
can be completely erroneous. The OD flag bit will be
cleared to logic 0 when the modulator becomes sta-
ble.
Table 2 and Table 3 illustrate the output coding for
the CS5529. Unipolar conversions are output in bi-
nary format and bipolar conversions are output
two’s complement.
-0.5 LSB
D17
D5
9
1
D16
D4
8
1
D15
D3
7
0
Complement
Two’s
7FFE
FFFF
7FFF
7FFF
0000
8001
8000
8000
-----
-----
-----
D14
D2
6
0
D13
OD
D1
5
CS5529
DS246F1
D12
D0
OF
4

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