DSPIC30F6010-20E/PF Microchip Technology, DSPIC30F6010-20E/PF Datasheet - Page 229

• Manufacturer Part Number: DSPIC30F6010-20E/PF
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-20E/PF

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TQFP, 80-VQFP
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F601020EPF

Timing Specifications
Trap Vectors ....................................................................... 42
Traps ................................................................................... 41
U
UART
© 2007 Microchip Technology Inc.
SPI Master Mode (CKE = 0) ..................................... 196
SPI Master Mode (CKE = 1) ..................................... 197
SPI Slave Mode (CKE = 0) ....................................... 199
SPI Slave Mode (CKE = 1) ....................................... 201
Timer1 External Clock............................................... 187
Timer2 and Timer4 External Clock ........................... 188
Timer3 and Timer5 External Clock ........................... 188
PLL Clock.................................................................. 181
PLL Jitter................................................................... 181
Hard and Soft.............................................................. 42
Trap Sources .............................................................. 41
Address Detect Mode ............................................... 119
Alternate I/O.............................................................. 117
Auto-Baud Support ................................................... 120
Baud Rate Generator................................................ 119
Disabling ................................................................... 117
Enabling and Setting Up ........................................... 117
Loopback Mode ........................................................ 119
Module Overview ...................................................... 115
Operation During CPU Sleep and Idle Modes .......... 120
Receiving Data.......................................................... 118
Reception Error Handling.......................................... 118
In 8-bit or 9-bit Data Mode ................................ 118
Interrupt ............................................................ 118
Receive Buffer (UxRCB) ................................... 118
Framing Error (FERR) ...................................... 119
Idle Status ......................................................... 119
Parity Error (PERR) .......................................... 119
Receive Break .................................................. 119
Receive Buffer Overrun Error (OERR Bit) ........ 118
Unit ID Locations .............................................................. 145
Universal Asynchronous Receiver
W
Wake-up from Sleep ......................................................... 145
Wake-up from Sleep and Idle ............................................. 43
Watchdog Timer (WDT)............................................ 145, 155
WWW Address ................................................................. 228
WWW, On-Line Support ....................................................... 6
dsPIC30F4011/4012
Setting Up Data, Parity and Stop Bit
Transmitting Data ..................................................... 117
UART1 Register Map ............................................... 121
UART2 Register Map ............................................... 121
Transmitter Module (UART) ..................................... 115
Enabling and Disabling............................................. 155
Operation.................................................................. 155
Selections ......................................................... 117
Break ................................................................ 118
In 8-bit Data Mode ............................................ 117
In 9-bit Data Mode ............................................ 117
Interrupt ............................................................ 118
Transmit Buffer (UxTXB) .................................. 117
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