DSPIC30F6011A-20E/PT Microchip Technology, DSPIC30F6011A-20E/PT Datasheet - Page 187
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DSPIC30F6011A-20E/PT
Manufacturer Part Number
DSPIC30F6011A-20E/PT
Description
Digital Signal Processor
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F5011-20IPT.pdf
(220 pages)
4.DSPIC30F6011A-30IPT.pdf
(234 pages)
5.DSPIC30F6011A-30IPT.pdf
(8 pages)
6.DSPIC30F6011A-30IPT.pdf
(10 pages)
7.DSPIC30F6011A-30IPT.pdf
(6 pages)
8.DSPIC30F6011A-30IPT.pdf
(8 pages)
9.DSPIC30F6011A-30IPT.pdf
(16 pages)
Specifications of DSPIC30F6011A-20E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
52
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011A-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6011A-20E/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 23-29: DCI MODULE (MULTICHANNEL, I
© 2011 Microchip Technology Inc.
AC CHARACTERISTICS
CS10
CS11
CS20
CS21
CS30
CS31
CS35
CS36
CS40
CS41
CS50
CS51
CS55
CS56
Note 1:
Param
No.
2:
3:
4:
Tc
Tc
Tc
Tc
Tc
Tc
T
T
T
T
Tco
Tco
Tsco
T
Symbol
CSDI
DV
DIV
HCSDI
HCOFS
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
The minimum clock period for CSCK is 100 ns. Therefore, the clock generated in Master mode must not
violate this specification.
SCKL
SCKH
SCKF
SCKR
SDOF
SDOR
Assumes 50 pF load on all DCI pins.
FSF
FSR
FS
CSCK Input Low Time
(CSCK pin is an input)
CSCK Output Low Time
(CSCK pin is an output)
CSCK Input High Time
(CSCK pin is an input)
CSCK Output High Time
(CSCK pin is an output)
CSCK Output Fall Time
(CSCK pin is an output)
CSCK Output Rise Time
(CSCK pin is an output)
CSDO Data Output Fall Time
CSDO Data Output Rise Time
Clock edge to CSDO data valid
Clock edge to CSDO tri-stated
Setup time of CSDI data input to
CSCK edge (CSCK pin is input
or output)
Hold time of CSDI data input to
CSCK edge (CSCK pin is input
or output)
COFS Fall Time
(COFS pin is output)
COFS Rise Time
(COFS pin is output)
Setup time of COFS data input to
CSCK edge (COFS pin is input)
Hold time of COFS data input to
CSCK edge (COFS pin is input)
Characteristic
(1)
(4)
(3)
(4)
(3)
(4)
(4)
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
T
T
2
CY
CY
S MODES) TIMING REQUIREMENTS
Min
20
30
20
30
—
10
20
20
20
20
—
—
—
—
—
—
/ 2 +
/ 2 +
dsPIC30F5011/5013
Typ
10
10
10
10
10
10
—
—
—
—
—
—
—
—
—
—
(2)
Max
-40°C ≤ T
-40°C ≤ T
25
25
25
25
10
20
25
25
—
—
—
—
—
—
—
—
A
A
Units
≤ +85°C for Industrial
≤ +125°C for Extended
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1
Note 1
DS70116J-page 187
Conditions