DSPIC30F6011A-20E/PT Microchip Technology, DSPIC30F6011A-20E/PT Datasheet - Page 214

• Manufacturer Part Number: DSPIC30F6011A-20E/PT
• Description: Digital Signal Processor
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6011A-20E/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 132KB (44K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F5011/5013
Output Compare Sleep Mode Operation............................. 84
P
Packaging Information ...................................................... 203
Peripheral Module Disable (PMD) Registers .................... 149
Pinout Descriptions ............................................................. 12
PLL Clock Timing Specifications....................................... 175
POR. See Power-on Reset.
Port Write/Read Example.................................................... 58
PORTA
PORTB
PORTC
PORTD
PORTF
PORTG
Power Saving Modes ........................................................ 147
Power-Down Current (I
Power-up Timer
Program Address Space ..................................................... 23
Program and EEPROM Characteristics ............................ 172
Program Counter................................................................. 16
Programmable................................................................... 137
Programmer’s Model........................................................... 16
Programming Operations .................................................... 49
Protection Against Accidental Writes to OSCCON ........... 142
R
Reader Response ............................................................. 216
Reset......................................................................... 137, 143
DS70116J-page 214
Marking ..................................................................... 203
Register Map for dsPIC30F5013 ................................ 59
Register Map for dsPIC30F5011/5013 ....................... 59
Register Map for dsPIC30F5011 ................................ 59
Register Map for dsPIC30F5013 ................................ 59
Register Map for dsPIC30F5011 ................................ 60
Register Map for dsPIC30F5013 ................................ 60
Register Map for dsPIC30F5011 ................................ 60
Register Map for dsPIC30F5013 ................................ 61
Register Map for dsPIC30F5011/5013 ....................... 61
Idle ............................................................................ 148
Sleep ......................................................................... 147
Sleep and Idle ........................................................... 137
Timing Characteristics .............................................. 178
Timing Requirements ................................................ 179
Construction ................................................................ 24
Data Access from Program Memory Using Program
Data Access From Program Memory Using Table In-
Data Access from, Address Generation...................... 24
Data Space Window into Operation ............................ 27
Data Table Access (LS Word) .................................... 25
Data Table Access (MS Byte) ..................................... 26
Memory Map ............................................................... 23
Table Instructions
Diagram ...................................................................... 17
Algorithm for Program Flash ....................................... 49
Erasing a Row of Program Memory ............................ 49
Initiating the Programming Sequence ......................... 50
Loading Write Latches ................................................ 50
BOR, Programmable................................................. 145
Brown-out Reset (BOR) ............................................ 137
Space Visibility.................................................... 26
structions............................................................. 25
TBLRDH.............................................................. 25
TBLRDL .............................................................. 25
TBLWTH ............................................................. 25
TBLWTL.............................................................. 25
PD
) ................................................ 168
Reset Sequence ................................................................. 37
Reset Sources
Reset Timing Characteristics............................................ 178
Reset Timing Requirements ............................................. 179
Run-Time Self-Programming (RTSP) ................................. 47
S
Simple Capture Event Mode............................................... 77
Simple OC/PWM Mode Timing Requirements ................. 185
Simple Output Compare Match Mode ................................ 82
Simple PWM Mode ............................................................. 82
Software Simulator (MPLAB SIM) .................................... 161
Software Stack Pointer, Frame Pointer .............................. 16
SPI Module ......................................................................... 87
Status Bits, Their Significance and the Initialization Condition
Status Bits, Their Significance and the Initialization Condition
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions ............................ 152
System Integration............................................................ 137
T
Table Instruction Operation Summary ................................ 47
Temperature and Voltage Specifications
Timer1 Module.................................................................... 63
Oscillator Start-up Timer (OST) ................................ 137
POR
POR (Power-on Reset)............................................. 143
Power-on Reset (POR)............................................. 137
Power-up Timer (PWRT) .......................................... 137
Reset Sources ............................................................ 37
Brown-out Reset (BOR).............................................. 37
Illegal Instruction Trap ................................................ 37
Trap Lockout............................................................... 37
Uninitialized W Register Trap ..................................... 37
Watchdog Time-out .................................................... 37
Buffer Operation ......................................................... 78
Hall Sensor Mode ....................................................... 78
Prescaler .................................................................... 77
Timer2 and Timer3 Selection Mode............................ 78
Input Pin Fault Protection ........................................... 82
Period ......................................................................... 83
CALL Stack Frame ..................................................... 31
Framed SPI Support ................................................... 87
Operating Function Description .................................. 87
Operation During CPU Idle Mode ............................... 89
Operation During CPU Sleep Mode............................ 89
SDOx Disable ............................................................. 87
Slave Select Synchronization ..................................... 89
SPI1 Register Map...................................................... 90
SPI2 Register Map...................................................... 90
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 87
for RCON Register, Case 1 ...................................... 146
for RCON Register, Case 2 ...................................... 146
Register Map ............................................................ 150
AC............................................................................. 173
Operating without FSCM and PWRT................ 145
With Long Crystal Start-up Time ...................... 145
Master Mode (CKE = 0).................................... 189
Master Mode (CKE = 1).................................... 190
Slave Mode (CKE = 1).............................. 191, 192
Master Mode (CKE = 0).................................... 189
Master Mode (CKE = 1).................................... 190
Slave Mode (CKE = 0)...................................... 191
Slave Mode (CKE = 1)...................................... 193
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