PIC16C926-I/PT Microchip Technology, PIC16C926-I/PT Datasheet - Page 29

• Manufacturer Part Number: PIC16C926-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C926-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: OTP
• Ram Size: 336 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 336 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16C926I/PT

3.0
The Program Memory is readable during normal oper-
ation over the entire V
addressed through Special Function Registers (SFR).
Up to 14-bit numbers can be stored in memory for use
as calibration parameters, serial numbers, packed 7-bit
ASCII, etc. Executing a program memory location con-
taining data that forms an invalid instruction results in a
NOP.
There are five SFRs used to read the program and
memory. These registers are:
• PMCON1
• PMDATA
• PMDATH
• PMADR
• PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
REGISTER 3-1: PMCON1 REGISTER (ADDRESS 10Ch)
2001 Microchip Technology Inc.
bit 7
bit 6-1
bit 0
READING PROGRAM MEMORY
bit 7
Reserved: Read as ‘1’
Unimplemented: Read as ‘0’
RD: Read Control bit
1 = Initiates a read, RD is cleared in hardware. The RD bit can only be set (not cleared)
0 = Does not initiate a read
Legend:
R = Readable bit
- n = Value at POR reset
R-1
in software.
r
DD
range. It is indirectly
U-0
—
U-0
—
Preliminary
W = Writable bit
’1’ = Bit is set
U-0
—
When interfacing to the program memory block, the
PMDATH:PMDATA registers form a two-byte word,
which
PMADRH:PMADR registers form a two-byte word,
which holds the 13-bit address of the location being
accessed. These devices can have from 4K words to
8K words of program memory, with an address range
from 0h to 3FFFh.
The unused upper bits in both the PMDATH and
PMADRH registers are not implemented and read as
“0’s”.
3.1
The address registers can address up to a maximum of
8K words of program memory.
When selecting a program address value, the MSByte
of the address is written to the PMADRH register and
the LSByte is written to the PMADR register. The upper
MSbits of PMADRH must always be clear.
3.2
PMCON1 is the control register for memory accesses.
The control bit RD initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
holds
PMADR
PMCON1 Register
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-x
—
PIC16C925/926
the
14-bit
U-0
—
data
x = Bit is unknown
U-0
—
DS39544A-page 27
for
reads.
R/S-0
RD
bit 0
The