PIC16C926-I/PT Microchip Technology, PIC16C926-I/PT Datasheet - Page 65

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC16C926-I/PT

Manufacturer Part Number
PIC16C926-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C926-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C926I/PT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
The SS pin allows a Synchronous Slave mode. The
SPI must be in Slave mode (SSPCON<3:0> = 04h)
and the TRISA<5> bit must be set for the Synchro-
nous Slave mode to be enabled. When the SS pin
is low, transmission and reception are enabled and
the SDO pin is driven. When the SS pin goes high,
the SDO pin is no longer driven, even if in the mid-
dle of a transmitted byte and becomes a floating
output. External pull-up/pull-down resistors may be
desirable, depending on the application.
FIGURE 9-3:
FIGURE 9-4:
SCK (CKP = 0,
SCK (CKP = 0,
SCK (CKP = 1,
SCK (CKP = 1,
SDO
SDI (SMP = 0)
SCK (CKP = 0)
SCK (CKP = 1)
SDI (SMP = 1)
2001 Microchip Technology Inc.
SS (optional)
SDO
SDI (SMP = 0)
SSPIF
SSPIF
CKE = 0)
CKE = 1)
CKE = 0)
CKE = 1)
SPI MODE TIMING, MASTER MODE
SPI MODE TIMING (SLAVE MODE WITH CKE = 0)
bit7
bit7
bit7
bit7
bit7
bit6
bit6
Preliminary
bit5
bit5
bit4
bit4
To emulate two-wire communication, the SDO pin can
be connected to the SDI pin. When the SPI needs to
operate as a receiver, the SDO pin can be configured
as an input. This disables transmissions from the SDO.
The SDI can always be left as an input (SDI function)
since it cannot create a bus conflict.
Note 1: When the SPI is in Slave mode with SS
bit3
bit3
2: If the SPI is used in Slave mode with
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to V
CKE = ’1’, then the SS pin control must be
enabled.
PIC16C925/926
bit2
bit2
DD
.
bit1
bit1
DS39544A-page 63
bit0
bit0
bit0
bit0
bit0

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