PIC16C926-I/PT Microchip Technology, PIC16C926-I/PT Datasheet - Page 83

• Manufacturer Part Number: PIC16C926-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C926-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: OTP
• Ram Size: 336 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 336 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16C926I/PT

FIGURE 10-4:
10.5
The A/D module can operate during SLEEP mode. This
requires that the A/D clock source be set to RC
(ADCS<1:0> = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
SLEEP. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
TABLE 10-2:
Address
0Bh
0Ch
8Ch
1Eh
9Eh
1Fh
9Fh
85h
05h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These bits are reserved; always maintain these bits clear.
2001 Microchip Technology Inc.
A/D Operation During SLEEP
INTCON
PIR1
PIE1
ADRESH
ADRESL
ADCON0
ADCON1
TRISA
PORTA
Name
7
0000 00
REGISTERS/BITS ASSOCIATED WITH A/D
ADRESH
A/D Result Register High Byte
A/D Result Register Low Byte
ADCS1
LCDIF
LCDIE
ADFM
Bit 7
A/D RESULT JUSTIFICATION
GIE
—
—
Right Justified
2 1 0 7
ADFM = 1
ADCS0
ADIE
PEIE
ADIF
Bit 6
—
—
—
10-bit Result
ADRESL
PORTA Data Direction Register
PORTA Data Latch when written: PORTA pins when read
TMR0IE
CHS2
Bit 5
(1)
(1)
—
CHS1
0
INTE
Bit 4
(1)
(1)
—
Preliminary
10-Bit Result
PCFG3
SSPIF
SSPIE
CHS0
RBIE
Bit 3
Turning off the A/D places the A/D module in its lowest
current consumption state.
10.6
A device RESET forces all registers to their RESET
state. This forces the A/D module to be turned off, and
any conversion is aborted. All A/D input pins are con-
figured as analog inputs.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
GO/DONE
TMR0IF
CCP1IF
CCP1IE
Note:
PCFG2
Bit 2
7
modified
ADRESH
Effects of a RESET
For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS<1:0> = 11). To allow the conver-
sion to occur during SLEEP, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
10-bit Result
TMR2IE TMR1IE r0rr 0000 r0rr 0000
TMR2IF TMR1IF r0rr 0000 r0rr 0000
PCFG1
Bit 1
INTF
—
PIC16C925/926
ADFM = 0
Left Justified
for
0 7 6 5
PCFG0
ADON
RBIF
Bit 0
a
ADRESL
Power-on
0000 00
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--0- 0000
--11 1111 --11 1111
--0x 0000 --0u 0000
POR,
BOR
DS39544A-page 81
0
Reset.
--0- 0000
MCLR,
WDT
The