PIC16F636T-I/ML Microchip Technology, PIC16F636T-I/ML Datasheet - Page 57
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F636T-I/ML
Manufacturer Part Number
PIC16F636T-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F635-ISN.pdf
(234 pages)
3.PIC16F636-ISL.pdf
(8 pages)
4.PIC16F636-ISL.pdf
(4 pages)
Specifications of PIC16F636T-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, SPI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC12F635-ISN PDF datasheet #2
- PIC16F636-ISL PDF datasheet #3
- PIC16F636-ISL PDF datasheet #4
- Current page: 57 of 234
- Download datasheet (4Mb)
4.2.4.5
Figure 4-5 shows the diagram for this pin. The RA4 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 gate input
• a crystal/resonator connection
• a clock output
FIGURE 4-5:
© 2007 Microchip Technology Inc.
Data Bus
WPUDA
WPUDA
PORTA
PORTA
TRISA
TRISA
WDA
WDA
IOCA
IOCA
WR
WR
WR
WR
WR
Note 1:
RD
RD
RD
RD
RD
Interrupt-on-
change
2:
D
D
D
D
D
T1G To Timer1
CK
CK
CK
CK
CK
Oscillator modes are XT, HS, LP, LPTMR1 and
CLKOUT Enable.
With CLKOUT option.
RA4/T1G/OSC2/CLKOUT
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA4
OSC1
F
OSC
RAPU
RC/EC
INTOSC/
CLKOUT
CLKOUT
Enable
CLK
Enable
/4
RD PORTA
CLKOUT
Enable
Oscillator
XTAL
(1)
Circuit
Q
Q
1
0
(2)
Modes
EN
EN
D
D
V
V
Q1
SS
V
DD
V
DD
SS
Weak
Weak
I/O pin
PIC12F635/PIC16F636/639
4.2.4.6
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-6:
Data Bus
WPUDA
WPUDA
PORTA
PORTA
TRISA
TRISA
WDA
WDA
IOCA
IOCA
WR
WR
WR
WR
RD
RD
RD
WR
Interrupt-on-
RD
RD
change
Note 1:
D
D
D
D
D
2:
T1G To Timer1
CK
CK
CK
CK
CK
RA5/T1CKI/OSC1/CLKIN
Oscillator modes are XT, HS, LP and LPTMR1.
When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA5
OSC2
RAPU
CLK
INTOSC
RD PORTA
Mode
Oscillator
Circuit
(1)
Q
Q
Modes
EN
EN
DS41232D-page 55
D
D
V
V
Q1
DD
SS
V
V
DD
SS
Weak
Weak
I/O pin
(2)
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