PIC16F636T-I/ML Microchip Technology, PIC16F636T-I/ML Datasheet - Page 81
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F636T-I/ML
Manufacturer Part Number
PIC16F636T-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F635-ISN.pdf
(234 pages)
3.PIC16F636-ISL.pdf
(8 pages)
4.PIC16F636-ISL.pdf
(4 pages)
Specifications of PIC16F636T-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, SPI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC12F635-ISN PDF datasheet #2
- PIC16F636-ISL PDF datasheet #3
- PIC16F636-ISL PDF datasheet #4
- Current page: 81 of 234
- Download datasheet (4Mb)
7.7
The comparator, if enabled before entering Sleep mode,
remains active during Sleep. The additional current
consumed by the comparator is shown separately in the
Section 15.0 “Electrical Specifications”. If the
comparator is not used to wake the device, power
consumption can be minimized while in Sleep mode by
turning off the comparator. The comparator is turned off
by selecting mode CM<2:0> = 000 or CM<2:0> = 111
of the CMCON0 register.
A change to the comparator output can wake-up the
device from Sleep. To enable the comparator to wake
the device from Sleep, the CxIE bit of the PIE1 register
and the PEIE bit of the INTCON register must be set.
The instruction following the Sleep instruction always
executes following a wake from Sleep. If the GIE bit of
the INTCON register is also set, the device will then
execute the Interrupt Service Routine.
REGISTER 7-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
U-0
—
Operation During Sleep
Unimplemented: Read as ‘0’
COUT: Comparator Output bit
When CINV = 0:
1 = V
0 = V
When CINV = 1:
1 = V
0 = V
Unimplemented: Read as ‘0’
CINV: Comparator Output Inversion bit
1 = Output inverted
0 = Output not inverted
CIS: Comparator Input Switch bit
When CM<2:0> = 110 or 101:
1 = CIN+ connects to V
0 = CIN- connects to V
When CM<2:0> = 0xx or 100 or 111:
CIS has no effect.
CM<2:0>: Comparator Mode bits (See Figure 7-5)
000 = CIN pins are configured as analog, COUT pin configured as I/O, Comparator output turned off
001 = CIN pins are configured as analog, COUT pin configured as Comparator output
010 = CIN pins are configured as analog, COUT pin configured as I/O, Comparator output available internally
011 = CIN- pin is configured as analog, CIN+ pin is configured as I/O, COUT pin configured as
100 = CIN- pin is configured as analog, CIN+ pin is configured as I/O, COUT pin is configured as I/O, Comparator output
101 = CIN pins are configured as analog and multiplexed, COUT pin is configured as
110 = CIN pins are configured as analog and multiplexed, COUT pin is configured as I/O,
111 = CIN pins are configured as I/O, COUT pin is configured as I/O, Comparator output disabled, Comparator off.
COUT
IN
IN
IN
IN
R-0
+ > V
+ < V
+ < V
+ > V
CMCON0: COMPARATOR CONFIGURATION REGISTER (PIC12F635)
Comparator output, CV
available internally, CV
Comparator output, CV
Comparator output available internally, CV
IN
IN
IN
IN
-
-
-
-
W = Writable bit
‘1’ = Bit is set
IN
U-0
IN
—
-
-
REF
REF
REF
is non-inverting input
is non-inverting input
is non-inverting input
R/W-0
PIC12F635/PIC16F636/639
CINV
REF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
is non-inverting input
7.8
A device Reset forces the CMCON0 and CMCON1
registers to their Reset states. This forces the Compar-
ator module to be in the Comparator Reset mode
(CM<2:0> = 000). Thus, all comparator inputs are
analog inputs with the comparator disabled to consume
the smallest current possible.
R/W-0
CIS
Effects of a Reset
R/W-0
CM2
x = Bit is unknown
R/W-0
CM1
DS41232D-page 79
R/W-0
CM0
bit 0
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