PIC16F636T-I/ML Microchip Technology, PIC16F636T-I/ML Datasheet - Page 91
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F636T-I/ML
Manufacturer Part Number
PIC16F636T-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,16PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F635-ISN.pdf
(234 pages)
3.PIC16F636-ISL.pdf
(8 pages)
4.PIC16F636-ISL.pdf
(4 pages)
Specifications of PIC16F636T-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, SPI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC12F635-ISN PDF datasheet #2
- PIC16F636-ISL PDF datasheet #3
- PIC16F636-ISL PDF datasheet #4
- Current page: 91 of 234
- Download datasheet (4Mb)
REGISTER 8-1:
TABLE 8-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
INTCON
PIE1
PIR1
LVDCON
Legend:
Name
U-0
—
2:
The IRVST bit is usable only when the HFINTOSC is running.
Not tested and below minimum operating conditions.
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used by the PLVD module.
OSFIE
OSFIF
Bit 7
GIE
—
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt must not be enabled
LVDEN: Low-Voltage Detect Module Enable bit
1 = Enables PLVD Module, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD Module, powers down PLVD circuit and supporting reference circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Level bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
000 = Reserved
REGISTERS ASSOCIATED WITH PROGRAMMABLE LOW-VOLTAGE DETECT
U-0
—
LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
PEIE
C2IE
Bit 6
C2IF
—
(2)
W = Writable bit
‘1’ = Bit is set
IRVST
IRVST
C1IE
Bit 5
T0IE
C1IF
R-0
(1)
LVDEN
LCDIE
LCDIF
INTE
Bit 4
LVDEN
R/W-0
PIC12F635/PIC16F636/639
RAIE
Bit 3
—
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LVDL2
LVDIE
LVDIF
Bit 2
T0IF
U-0
—
LVDL1
(1)
Bit 1
INTF
—
—
LVDL2
R/W-1
CCP2IE
CCP2IF
LVDL0
RAIF
Bit 0
x = Bit is unknown
0000 000x
0000 -0-0
0000 -0-0
--00 -100
POR, BOR
LVDL1
R/W-0
Value on
DS41232D-page 89
0000 000x
0000 -0-0
0000 -0-0
--00 -100
Value on
all other
LVDL0
R/W-0
Resets
bit 0
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