PIC16F913-E/SS Microchip Technology, PIC16F913-E/SS Datasheet - Page 193

• Manufacturer Part Number: PIC16F913-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F913-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SSP, I2C, AUSART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.1.4
To read a program memory location, the user must
write two bytes of the address to the EEADRL and
EEADRH registers, set the EEPGD control bit, and
then set control bit RD of the EECON1 register. Once
the read control bit is set, the program memory Flash
controller will use the second instruction cycle to read
the data. This causes the second instruction immedi-
ately following the “BSF EECON1,RD” instruction to be
ignored. The data is available in the very next cycle, in
the EEDATL and EEDATH registers; therefore, it can
be read as two bytes in the following instructions.
EEDATL and EEDATH registers will hold this value until
another read or until it is written to by the user (during
a write operation).
EXAMPLE 13-3:
© 2007 Microchip Technology Inc.
Note 1: The two instructions following a program
;
;
2: If the WR bit is set when EEPGD = 1, the
READING THE FLASH PROGRAM
MEMORY
BANKSEL EEADRL
MOVLW
MOVWF
MOVLW
MOVWF
BANKSEL EECON1
BSF
BSF
NOP
NOP
BANKSEL EEDATL
MOVF
MOVWF
MOVF
MOVWF
memory read are required to be NOP’s.
This prevents the user from executing a
two-cycle
instruction after the RD bit is set.
WR bit will be immediately reset to ‘0’ and
no operation will take place.
FLASH PROGRAM READ
MS_PROG_EE_ADDR;
EEADRH
LS_PROG_EE_ADDR;
EEADRL
EECON1, EEPGD
EECON1, RD
EEDATL, W
DATAL
EEDATH, W
DATAH
instruction
on
;
;MS Byte of Program Address to read
;LS Byte of Program Address to read
;
;Point to PROGRAM memory
;EE Read
;Any instructions here are ignored as program
;memory is read in second cycle after BSF
;
;W = LS Byte of EEPROM Data program
;
;W = MS Byte of EEPROM Data program
;
the
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DS41250F-page 191