PIC16F913-E/SS Microchip Technology, PIC16F913-E/SS Datasheet - Page 215

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PIC16F913-E/SS

Manufacturer Part Number
PIC16F913-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F913-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SSP, I2C, AUSART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.1
In Capture mode, CCPRxH:CCPRxL captures the
16-bit value of the TMR1 register when an event occurs
on pin CCPx. An event is defined as one of the
following and is configured by the CCPxM<3:0> bits of
the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value (see Figure 15-1).
15.1.1
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
FIGURE 15-1:
© 2007 Microchip Technology Inc.
CCPx
pin
Note:
System Clock (F
Capture Mode
Edge Detect
CCPx PIN CONFIGURATION
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
Prescaler
÷ 1, 4, 16
and
CCPxCON<3:0>
OSC
)
Set Flag bit CCPxIF
(PIRx register)
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
Capture
Enable
CCPRxH
TMR1H
CCPRxL
TMR1L
PIC16F913/914/916/917/946
15.1.2
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
15.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in operating mode.
15.1.4
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler (see Example 15-1).
EXAMPLE 15-1:
BANKSEL CCP1CON
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
;Set Bank bits to point
;to CCP1CON
;Turn CCP module off
; the new prescaler
; move value and CCP ON
;Load CCP1CON with this
; value
DS41250F-page 213

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