PIC16F913-E/SS Microchip Technology, PIC16F913-E/SS Datasheet - Page 214

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PIC16F913-E/SS

Manufacturer Part Number
PIC16F913-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F913-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SSP, I2C, AUSART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F913/914/916/917/946
REGISTER 15-1:
DS41250F-page 212
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
U-0
Unimplemented: Read as ‘0’
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: CCP Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP module)
0001 = Unused (reserved)
0010 = Unused (reserved)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin
1011 = Compare mode, trigger special event (CCPxIF bit is set, TMR1 is reset and A/D
11xx = PWM mode.
U-0
CCPxCON: CCPx CONTROL REGISTER
is unaffected)
conversion is started if the ADC module is enabled. CCPx pin is unaffected.)
W = Writable bit
‘1’ = Bit is set
CCPxX
R/W-0
CCPxY
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
R/W-0
CCP1M2
R/W-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
CCP1M1
R/W-0
CCP1M0
R/W-0
bit 0

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