PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 240

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS39541A-page 240
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ’f’
operation
Move f to f
[label]
0
0
(f
None
The contents of source register ’f
are moved to destination register ’f
Location of source ’f
where in the 4096 byte data space
(000h to FFFh), and location of desti-
nation ’f
000h to FFFh.
Either source or destination can be
WREG (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
2
2 (3)
MOVFF
Read
s
(src)
read
1100
1111
)
No
Q2
=
=
=
=
f
f
s
d
f
d
d
4095
33h
11h
33h,
33h
4095
MOVFF f
’ can also be anywhere from
REG1, REG2
ffff
ffff
operation
Process
Data
No
Q3
s
ffff
ffff
,f
s
’ can be any-
d
Advance Information
operation
register ’f’
(dest)
Write
No
Q4
fff
fff
f
f
s
d
s
d
’
’.
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
MOVLB
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal ’k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
’k’
=
=
k
BSR
2001 Microchip Technology Inc.
255
02h
05h
05h
MOVLB k
0001
Process
Data
Q3
kkkk
literal ’k’ to
Write
BSR
Q4
kkkk