PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 56

• Manufacturer Part Number: PIC18C801-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C801-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 84-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C801-I/LR; PIC18C801-I/LR; PIC18C801I/L

PIC18C601/801
TABLE 4-2:
DS39541A-page 56
FB0h
FAFh
FAEh
FADh
FACh
FABh
FAAh
FA9h
FA8h
FA7h
FA6h
FA5h
FA4h
FA3h
FA2h
FA1h
FA0h
F9Fh
F9Eh
F9Dh
F9Ch
F9Bh
F9Ah
F99h
F98h
F96h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F8Fh
F8Eh
F8Dh
F8Ch
F8Bh
F8Ah
F89h
F88h
F87h
F86h
F85h
Legend
Note 1: Other (non-power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.
File Name
2: These registers can only be modified when the Combination Lock is open.
3: These registers are available on PIC18C801 only.
PSPCON
SPBRG
RCREG
TXREG
TXSTA
RCSTA
CSEL2
CSELIO
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
MEMCON
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ
LATH
LATG
LATF
LATE
LATD
LATC
LATB
LATA
PORTJ
PORTH
PORTG
PORTF
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved
(3)
(3)
(3)
(3)
(2)
(3)
(3)
(2)
(2)
REGISTER FILE SUMMARY - PIC18C601/801 (CONTINUED)
USART Baud Rate Generator
USART Receive Register
USART Transmit Register
Data Direction Control Register for PORTJ
Data Direction Control Register for PORTH
Read PORTF Data Latch, Write PORTF Data Latch
Data Direction Control Register for PORTE
Data Direction Control Register for PORTD
Data Direction Control Register for PORTC
Data Direction Control Register for PORTB
Read PORTJ Data Latch, Write PORTJ Data Latch
Read PORTH Data Latch, Write PORTH Data Latch
Read PORTF Data Latch, Write PORTF Data Latch
Read PORTE Data Latch, Write PORTE Data Latch
Read PORTD Data Latch, Write PORTD Data Latch
Read PORTC Data Latch, Write PORTC Data Latch
Read PORTB Data Latch, Write PORTB Data Latch
Read PORTJ Pins, Write PORTJ Data Latch
Read PORTH pins, Write PORTH Data Latch
Read PORTF pins, Write PORTF Data Latch
CSIO7
EBDIS
CSRC
SPEN
CSL7
Bit 7
—
—
—
—
—
—
—
—
—
—
—
—
CSIO6
PGRM
CSL6
ADIP
ADIF
ADIE
Bit 6
TX9
RX9
—
—
—
—
—
—
—
—
—
Data Direction Control Register for PORTA
Read PORTA Data Latch, Write PORTA Data Latch
CSIO5
WAIT1
SREN
TXEN
CSL5
RCIP
RCIF
RCIE
Bit 5
—
—
—
—
—
—
—
Advance Information
Read PORTG Data Latch, Write PORTG Data Latch
Read PORTG Data Latch, Write PORTG Data Latch
Read PORTG pins, Write PORTG Data Latch
CSIO4
CREN
WAIT0
SYNC
CSL4
Bit 4
TXIP
TXIF
TXIE
—
—
—
—
CSIO3
ADEN
BCLIP
BCLIF
BCLIE
SSPIP
SSPIF
SSPIE
CSL3
Bit 3
—
—
—
CCP1IP
CCP1IF
CCP1IE
CSIO2
BRGH
LVDIP
LVDIE
FERR
LVDIF
CSL2
Bit 2
—
—
TMR3IP
TMR3IF
TMR3IE
TMR2IP
TMR2IF
TMR2IE
CMLK1
OERR
CSIO1
TRMT
CSL1
WM1
Bit 1
2001 Microchip Technology Inc.
CCP2IP
CCP2IF
CCP2IE
TMR1IP
TMR1IF
TMR1IE
CMLK0
CSIO0
TX9D
RX9D
CSL0
WM0
Bit 0
---- --00 ---- --00
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 -010 0000 -010
0000 000x 0000 000x
1111 1111 uuuu uuuu
1111 1111 uuuu uuuu
---- 1111 ---- 1111
---- 0000 ---- 0000
---- 0000 ---- 0000
-111 1111 -111 1111
-000 0000 -000 0000
-000 0000 -000 0000
0000 --00 0000 --00
1111 1111 1111 1111
1111 1111 1111 1111
---1 1111 ---1 1111
1111 1111 1111 1111
1111 1111 1111 1111
1111 1111 1111 1111
1111 1111 1111 1111
1111 1111 1111 1111
--11 1111 --11 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---x xxxx ---u uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---x xxxx ---u uuuu
xxxx xx00 uuuu uu00
Value on
POR
RESETS
Value on
all other
(1)