PIC18F6680-E/PT Microchip Technology, PIC18F6680-E/PT Datasheet - Page 93

• Manufacturer Part Number: PIC18F6680-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6680-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EXAMPLE 5-3:
 2004 Microchip Technology Inc.
ERASE_BLOCK
WRITE_BUFFER_BACK
PROGRAM_LOOP
WRITE_WORD_TO_HREGS
PROGRAM_MEMORY
Required
Sequence
Required
Sequence
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BCF
BSF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
BSF
TBLRD*-
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVFW
MOVWF
TBLWT+*
DECFSZ
BRA
BSF
BCF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
BSF
DECFSZ
BRA
BCF
WRITING TO FLASH PROGRAM MEMORY (CONTINUED)
upper(CODE_ADDR)
TBLPTRU
high(CODE_ADDR)
TBLPTRH
low(CODE_ADDR)
TBLPTRL
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
EECON1, FREE
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
8
COUNTER_HI
high(BUFFER_ADDR)
FSR0H
low(BUFFER_ADDR)
FSR0L
8
COUNTER
POSTINC0, W
TABLAT
COUNTER
WRITE_WORD_TO_HREGS
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
COUNTER_HI
PROGRAM_LOOP
EECON1, WREN
PIC18F6585/8585/6680/8680
; load TBLPTR with the base
; address of the memory block
; point to Flash program memory
; access Flash program memory
; enable write to memory
; enable Row Erase operation
; disable interrupts
; write 55H
; write AAH
; start erase (CPU stall)
; re-enable interrupts
; dummy read decrement
; number of write buffer groups of 8 bytes
; point to buffer
; number of bytes in holding register
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
; loop until buffers are full
; point to Flash program memory
; access Flash program memory
; enable write to memory
; disable interrupts
; write 55h
; write 0AAh
; start program (CPU stall)
; re-enable interrupts
; loop until done
; disable write to memory
DS30491C-page 91