PIC18F6680-E/PT Microchip Technology, PIC18F6680-E/PT Datasheet - Page 96
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F6680-E/PT
Manufacturer Part Number
PIC18F6680-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XK1.pdf
(496 pages)
3.PIC18F6585-IPT.pdf
(8 pages)
4.PIC18F6585-IPT.pdf
(38 pages)
5.PIC18F6585-IPT.pdf
(14 pages)
Specifications of PIC18F6680-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6680-E/PT
Manufacturer:
MPS
Quantity:
53
Company:
Part Number:
PIC18F6680-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PCM18XK1 PDF datasheet #2
- PIC18F6585-IPT PDF datasheet #3
- PIC18F6585-IPT PDF datasheet #4
- PIC18F6585-IPT PDF datasheet #5
- Current page: 96 of 496
- Download datasheet (9Mb)
PIC18F6585/8585/6680/8680
REGISTER 6-1:
DS30491C-page 94
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
MEMCON REGISTER
EBDIS: External Bus Disable bit
1 = External system bus disabled, all external bus drivers are mapped as I/O ports
0 = External system bus enabled and I/O ports are disabled
Unimplemented: Read as ‘0’
WAIT<1:0>: Table Reads and Writes Bus Cycle Wait Count bits
11 = Table reads and writes will wait 0 T
10 = Table reads and writes will wait 1 T
01 = Table reads and writes will wait 2 T
00 = Table reads and writes will wait 3 T
Unimplemented: Read as ‘0’
WM<1:0>: TBLWT Operation with 16-bit Bus bits
1x = Word Write mode: LSB and MSB word output, WRH active when MSB written
01 = Byte Select mode: TABLAT data copied on both MS and LS Byte, WRH and (UB or LB)
00 = Byte Write mode: TABLAT data copied on both MS and LS Byte, WRH or WRL will activate
bit 7
Legend:
R = Readable bit
- n = Value at POR
EBDIS
Note:
R/W-0
Note 1: This bit is ignored when device is accessing external memory either to fetch an
will activate
(1)
The MEMCON register is held in Reset in Microcontroller mode.
instruction or perform TBLRD/TBLWT.
U-0
—
WAIT1
R/W-0
W = Writable bit
‘1’ = Bit is set
(1)
WAIT0
R/W-0
CY
CY
CY
CY
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
—
U-0
—
2004 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WM1
R/W-0
WM0
bit 0
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