FC4A-K2C1 IDEC, FC4A-K2C1 Datasheet - Page 37

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FC4A-K2C1

Manufacturer Part Number
FC4A-K2C1
Description
Analog Output Module
Manufacturer
IDEC
Datasheet

Specifications of FC4A-K2C1

Supply Voltage
24VDC
No. Of Analog Outputs
2
Output Voltage Dc Max
10V
External Height
90mm
Supply Voltage Min
20.4V
Operating Voltage Max
10V
Operating Voltage Min
-10V
External Width
23.25mm
External Depth
70mm
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MicroSmart CPU Module
Analog Output Parameters
Analog Output Signal Type
Analog Output Data Type
Analog Output Minimum/Maximum Values
Analog Output Data
Analog Output Operating Status
Analog output parameters include the analog output signal type, analog output data type, analog output minimum and
maximum values, analog output data, and analog output operating status. This section describes these parameters in detail.
A total of three analog output signal types are available, depending on the analog I/O or analog output module. Select an
analog output signal type for each analog output channel. When a channel is not used, select the default value or Not used
for the channel.
A total of two analog output data types are available, depending on the analog I/O or analog output module. Select an ana-
log output data type for each analog output channel.
For analog output values, when Optional range is selected for the Data Type, designate the analog output data minimum
and maximum values which can be –32,768 through 32,767.
The analog output data is converted into an analog output signal within the range specified by the analog output data type
and applicable parameters. The analog output data register number is shown under Data in the Configure Parameters dia-
log box.
END Refresh Type
The analog output data stored in a data register, such as D772, is converted into an analog output signal of voltage output
(0 to 10V DC) or current output (4 to 20 mA) as designated by the value stored in the data register allocated to analog out-
put signal type, such as D774.
While the CPU module is running, the analog output data stored in the allocated data register is updated at the END pro-
cessing of every scan or 10 ms, whichever is longer. While the CPU module is stopped, the analog output data remains at 0
or the designated analog output data minimum value, so the generated analog output signal remains at the minimum value
of 0V DC or 4 mA DC.
Ladder Refresh Type
While the CPU module is running, the analog output data stored in the allocated data register is updated when the RUNA
instruction contained in the ANST macro is executed. While the CPU module is stopped, the analog output data is not
updated. But the analog output signal can be changed by using the STPA instruction. For details, see page 4-21.
The operating status of each analog output channel is stored to a data register allocated to analog output operating status.
While the analog output is operating normally, the data register stores 0. The analog output operating status data register
number is shown under Status in the Configure Parameters dialog box.
END Refresh Type
The operating status of each analog output is stored to a data register, such as D773. While the analog output is operating
normally, the data register stores 0. The analog output operating status data is updated whether the CPU module is running
or stopped. The update occurs at the END processing of every scan or 10 ms, whichever is longer.
255
0
1
0
1
Voltage output
Current output
Not used
Binary data
Optional range
Parameter
Parameter
Voltage
Current
Voltage
Current
FC4A M
ICRO
S
Analog output data minimum value to maximum value (–32768 to 32767)
MART
FC4A-L03A1
FC4A-L03A1
A
NALOG
I/O M
FC4A-L03AP1
ODULE
FC4A-L03AP1
0 to 4095
0 to 10V DC
U
SER
4 to 20 mA DC
S
M
ANUAL
FC4A-K1A1
FC4A-K1A1
4: A
NALOG
–25000 to 25000
–10 to +10V DC
FC4A-K2C1
0 to 50000
I/O C
FC4A-K2C1
X
ONTROL
4-15

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