HDLO-3416 Avago Technologies US Inc., HDLO-3416 Datasheet - Page 10

• Manufacturer Part Number: HDLO-3416
• Description: DISPLAY DOT MATRIX 32.77X20.07MM 5X7 RED
• Manufacturer: Avago Technologies US Inc.
• Series: HDLx-3416r

Specifications of HDLO-3416

• Character Format: Dot Matrix
• Character Size: 6.9mm
• Led Color: Red
• Luminous Intensity: 3.5mcd
• No. Of Digits / Alpha: 4
• Display Area Width: 32.77mm
• Display Area Height: 10.16mm
• Millicandela Rating: *
• Internal Connection: *
• Size / Dimension: 1.29" x 0.79" (32.77mm x 20.07mm)
• Color: Red
• Configuration: *
• Voltage - Forward (vf) Typ: *
• Package / Case: 22-DIP
• Display Type: Alphanumeric
• Number Of Digits/alpha: 4
• Digit/alpha Size: 0.27" (6.86mm)
• Number Of Digits: 4
• Illumination Color: Red
• Wavelength: 626 nm
• Operating Voltage: - 0.5 V to 7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Common Pin: -
• Lead Free Status / Rohs Status: Details

strobing the blank input). All of
these blanking modes affect only
the output drivers, maintaining
the contents and write capability
of the internal RAMs and
Control Register, so that normal
loading of RAMs and Control
Register can take place even
with the display blanked.
Figure 3 shows how the
Extended Function Disable (bit
D
Master Blank (bit D
Control Register), Digit Blank
Disable (bit D
RAM), and BL input can be used
to blank the display.
When the Extended Function
Disable is a logic 1, the display
can be blanked only with the
BL input. When the Extended
Function Disable is a logic 0, the
display can be blanked through
the BL input, the Master Blank,
and the Digit Blank Disable. The
entire display will be blanked if
either the BL input is logic 0 or
the Master Blank is logic 1, pro-
viding all Digit Blank Disable
bits are logic 0. Those digits with
Digit Blank Disable bits a logic 1
will ignore both blank signals
and remain ON. The Digit Blank
Disable bits allow individual
characters to be blanked or
flashed in synchronization with
the BL input.
Table 1. Current Requirements at Different Brightness Levels
Symbol
I
10
DD
6
(#)
of the Control Register),
D
0
0
0
0
1
1
1
1
1
5
of the Attribute
2
of the
D
0
0
1
1
0
0
1
1
4
D
0
1
0
1
0
1
0
1
3
Figure 3. Display blanking truth table.
Dimming
Dimming of the display is con-
trolled through either the BL
input or the Control Register. A
pulse width modulated signal
can be applied to the BL input
to dim the display. A three bit
word in the Control Register
generates an internal pulse
width modulated signal to dim
the display. The internal
dimming feature is enabled only
if the Extended Function
Disable is a logic 0.
EFD
Brightness
100%
60%
40%
27%
17%
10%
7%
3%
0
0
0
0
0
1
1
MB
X
X
X
0
0
1
1
25 C Typ.
110
66
45
30
20
12
9
4
DBD n
0
X
1
0
1
X
X
BL
0
1
0
X
1
0
1
25 C Max.
130
79
53
37
24
15
11
6
–Display Blanked by BL
–Display ON
–Display Blanked by BL.
–Display Blanked by MB
–Display Blanked by MB.
–Display Blanked by BL
–Display ON
Bits 3–5 in the Control Register
provide internal brightness
control. These bits are inter-
preted as a three bit binary code,
with code (000) corresponding to
the maximum brightness and
code (111) to the minimum
brightness. In addition to
varying the display brightness,
bits 3–5 also vary the average
value of I
at any brightness level as shown
in Table 1.
Individual Characters “ON”
based on “1” being stored in DBD n
Individual characters “ON”
based on “1” being stored in DBD n
Max. over Temp.
160
98
66
46
31
20
15
9
DD
. I
DD
can be specified
Units
mA
mA
mA
mA
mA
mA
mA
mA