AD9552/PCBZ Analog Devices Inc, AD9552/PCBZ Datasheet - Page 24

• Manufacturer Part Number: AD9552/PCBZ
• Description: Oscillator Frequency Upconverter Eval Board
• Manufacturer: Analog Devices Inc

Specifications of AD9552/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: PLL Clock Generator
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9552
• Design Resources: Clock Distribution Circuit with Pin-Programmable Output Frequency, Output Logic Levels, and Fanout (CN0152)
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9552
• Primary Attributes: 6.6 MHz ~ 112.5 MHz Input
• Secondary Attributes: CMOS, LVPECL & LVDS Compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9552
Addr.
(Hex)
0x1C
0x1D
0x32
0x33
0x34
REGISTER MAP DESCRIPTIONS
Control bit functions are active high unless stated otherwise. Register address values are always hexadecimal unless otherwise indicated.
Serial Port Control (Register 0x00 to Register 0x05)
Table 18.
Address
0x00
0x04
0x05
Register
Name
XTAL
control
XTAL
control
OUT1
driver
control
Select OUT2
source
OUT2
driver
control
Bit
7
6
5
4
[3:0]
[7:1]
0
[7:1]
0
Bit Name
Unused
LSB first
Soft reset
Unused
Unused
Unused
Readback control
Unused
I/O update
Unused
Unused
OUT1 drive
strength
Unused
OUT2 drive
strength
(MSB) Bit 7
Bit 6
Unused
Unused
OUT1
power-
down
Unused
OUT2
power-
down
Bit 5
Unused
Unused
Unused
Description
Forced to Logic 0 internally, which enables 3-wire mode only.
Bit order for SPI port.
0 = most significant bit and byte first (default).
1 = least significant bit and byte first.
Software initiated reset (register values set to default). This is an autoclearing bit.
Forced to Logic 1 internally, which enables 16-bit mode (the only mode supported by
the device).
Mirrored version of the contents of Register 0x00[7:4] (that is, Bits[3:0] = Bits[7:4]).
Unused.
For buffered registers, serial port readback reads from actual (active) registers instead of
from the buffer.
0 = reads values currently applied to the internal logic of the device (default).
1 = reads buffered values that take effect on next assertion of I/O update.
Unused.
Writing a 1 to this bit transfers the data in the serial I/O buffer registers to the internal
control registers of the device. This is an autoclearing bit.
OUT1 mode control[2:0]
OUT2 mode control[2:0]
Rev. C | Page 24 of 32
Bit 4
Unused
Unused
Unused
Bit 3
Unused
Unused
OUT2
source
Bit 2
Unused
Select 2×
frequency
multiplier
Unused
OUT1 CMOS polarity[1:0]
OUT2 CMOS polarity[1:0]
Bit 1
Unused
Unused
Unused
(LSB)
Bit 0
Unused
Use crystal
resonator
Enable SPI
control of
OUT1
driver
control
Unused
Enable SPI
control of
OUT2
driver
control
Default
0x00
0x00
0xA8
0x00
0xA8