702560 Spectrum Digital Inc, 702560 Datasheet - Page 26

• Manufacturer Part Number: 702560
• Description: XDS560R USB JTAG Emulator With 20 Pin CTI JTAG Header
• Manufacturer: Spectrum Digital Inc
• Type: USB JTAG Emulatorr

Specifications of 702560

• Contents: Board, Cable
• Ic Product Type: USB JTAG Emulator
• Kit Contents: XDS560R USB JTAG Emulator With CTI JTAG Header, CDROM With Drivers, USB Cable
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: TI DSPs and JTAG Microcontrollers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spectrum Digital, Inc
3.4.1 Emulation Timing Calculations
3-8
The following examples help you calculate emulation timings in your system. For actual
target timing parameters, see the appropriate device data sheet.
Assumptions:
Given in Table 2 above:
There are two key timing paths to consider in the emulation design:
Equation 3-1. Key Timing Path Case 1
Case 1: Single processor, direct connection, TMS/TDI timed from TCK_RET high.
In this case, the TCK_RET-to-TDO path is the limiting factor.
t
t
t
t
T(
T
t
t
❏
❏
Of the following two cases (Equation 3-1 and Equation 3-2), the worst-case
path delay is calculated to determine the maximum system test clock
frequency.
t
t
su(TTMS)
pd(TTDO)
pd(bufmax)
pd(bufmin)
d(TMSmax)
su(TDOmin)
pd(TCK_RET - TMS/TDI)
pd(TCK_RET - TDO)
(TCKfactor)
bufskew)
The TCK_RET-to-TMS/TDI path, called t
The TCK_RET-to-TDO path, called t
= [ t
= [15 ns + 2.5 ns] / 0.4
= 43.75 ns (22.9 MHz)
Setup time, target TMS/TDI before TCK high
Delay time, TCK low to valid target TDO
Delay time, target buffer - maximum
Delay time, target buffer - minimum
Skew time, target buffer between two devices
in the same package:
40/60 clock duty cycle
Delay time, emulator TMS/TDI valid
from TCK_RET high
Setup time, TDO before emulator
TCK_RET high, minimum 2.5 ns
= 31 ns + 10 ns
= 41 ns (24.4 MHz)
= t
d(TTDO)
pd(TMSmax)
[ t
d(bufmax)
+ t
su(TDOmin)
XDS560R JTAG Emulator Installation Guide
+ t
-
t
d(bufmin)
su(TTMS)
pd(TCK_RET-TDO)
] / t
pd(TCK_RET-TMS/TDI)
] x 0.15
(TCKfactor)
.
10 ns
15 ns
10 ns
1 ns
1.35 ns
0.4(40%)
31 ns
2.5 ns
, and